search

fritzing / fritzing-parts

Electronic components for use in the Fritzing app (aka the parts library)
http://fritzing.org/parts
Other
505 stars 358 forks source link

Infineon boards #349

Closed janaifx closed 1 year ago

janaifx commented 1 year ago

Hi,

I have added Infineon boards, would like to see it in Fritzing tool (parts tab). will be adding more boards in future. Kindly let me know if there are any improvements needed.

Thanks Jana

janaifx commented 1 year ago

Hi, can you please check the files and let me know. Awaiting for your response. Thanks Jana

janaifx commented 1 year ago

hello @KjellMorgenstern and @mMerlin i hope you are the right person to approve this request. kindly have a look and let me know to proceed further

KjellMorgenstern commented 1 year ago

Hello @janaifx , thanks for the PR. I see the automated tests didn't yet run, which seems to be a new security feature from github. I have ran them now. The obvious steps would be to pass those tests. Right now I think the SVG filenames don't match.

janaifx commented 1 year ago

Hello @KjellMorgenstern i have updated the file naming, can you please run the test now...

janaifx commented 1 year ago

Hello @KjellMorgenstern i have done one more changes, please run the script now

janaifx commented 1 year ago

@KjellMorgenstern I have placed Infineon logo in fritzing-parts\bins\more folder, is that ok? if not can you provide me your requirement

janaifx commented 1 year ago

@KjellMorgenstern I see some error image can you provide me more info on this?

KjellMorgenstern commented 1 year ago

See the below extract from the svg. The path directly after the description is not inside the group, or has any other layer id. This might lead to rendering issues. It is used for example when selecting layers in the corresponding view image

    <desc  id="desc2">Fritzing breadboard generated by brd2svg</desc>
    <path fill="#c62717"  stroke="#c62717" d="m 3.3988497,0.22593894 c -1.75776,0 -3.17285221,1.41509226 -3.17285221,3.17285226 V 105.91298 c 0,1.75776 1.41509221,3.17285 3.17285221,3.17285 H 81.25678 c 1.75776,0 3.172853,-1.41509 3.172853,-3.17285 V 3.3987912 c 0,-1.75776 -1.415093,-3.17285226 -3.172853,-3.17285226 z M 34.356865,1.6072869 a 1.7727114,1.7727114 0 0 1 1.772461,1.7724614 1.7727114,1.7727114 0 0 1 -1.772461,1.7724613 1.7727114,1.7727114 0 0 1 -1.772462,-1.7724613 1.7727114,1.7727114 0 0 1 1.772462,-1.7724614 z m -29.100593,0.00439 a 1.7727114,1.7727114 0 0 1 0.00146,0 1.7727114,1.7727114 0 0 1 0.068848,0 A 1.7727114,1.7727114 0 0 1 7.0990459,3.3841428 1.7727114,1.7727114 0 0 1 5.3265845,5.1566041 1.7727114,1.7727114 0 0 1 3.5541232,3.3841428 1.7727114,1.7727114 0 0 1 5.256272,1.6116814 Z m 72.237322,6.6855529 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.9365242 1.9363469,1.9363469 0 0 1 -1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,-1.936523 1.9363469,1.9363469 0 0 1 1.935061,-1.9365242 z M 34.290946,8.8099254 a 1.7727114,1.7727114 0 0 1 0.0015,0 1.7727114,1.7727114 0 0 1 0.06885,0 1.7727114,1.7727114 0 0 1 1.772461,1.7724616 1.7727114,1.7727114 0 0 1 -1.772461,1.772461 1.7727114,1.7727114 0 0 1 -1.772461,-1.772461 1.7727114,1.7727114 0 0 1 1.702148,-1.7724616 z M 5.3309791,8.8128549 A 1.7727114,1.7727114 0 0 1 7.1034404,10.585316 1.7727114,1.7727114 0 0 1 5.3309791,12.359243 1.7727114,1.7727114 0 0 1 3.5585177,10.585316 1.7727114,1.7727114 0 0 1 5.3309791,8.8128549 Z M 77.505309,15.483755 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,1.936525 1.9363469,1.9363469 0 0 1 -1.936523,-1.936525 1.9363469,1.9363469 0 0 1 1.935053,-1.936523 z m -43.14405,0.515625 a 1.7727114,1.7727114 0 0 1 1.772461,1.772461 1.7727114,1.7727114 0 0 1 -1.772461,1.773927 1.7727114,1.7727114 0 0 1 -1.772461,-1.773927 1.7727114,1.7727114 0 0 1 1.772461,-1.772461 z m -29.0302799,0.0044 a 1.7727114,1.7727114 0 0 1 1.7724613,1.772456 1.7727114,1.7727114 0 0 1 -1.7724613,1.772461 1.7727114,1.7727114 0 0 1 -1.7724614,-1.772461 1.7727114,1.7727114 0 0 1 1.7724614,-1.772461 z m 72.1845899,6.689937 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936525 1.9363469,1.9363469 0 0 1 -1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,-1.936523 1.9363469,1.9363469 0 0 1 1.935061,-1.936525 z m -43.215833,0.512696 a 1.7727114,1.7727114 0 0 1 0.07031,0 1.7727114,1.7727114 0 0 1 1.772461,1.772462 1.7727114,1.7727114 0 0 1 -1.772461,1.772461 1.7727114,1.7727114 0 0 1 -1.772461,-1.772461 1.7727114,1.7727114 0 0 1 1.702149,-1.772462 z m -28.9599679,0.0029 A 1.7727114,1.7727114 0 0 1 7.1122295,24.981804 1.7727114,1.7727114 0 0 1 5.3397681,26.75573 1.7727114,1.7727114 0 0 1 3.5673068,24.981804 1.7727114,1.7727114 0 0 1 5.3397681,23.209342 Z m 72.1670109,6.68262 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.935059 1.9363469,1.9363469 0 0 1 -1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,-1.936523 1.9363469,1.9363469 0 0 1 1.935061,-1.935059 z m -43.136731,0.520019 a 1.7727114,1.7727114 0 0 1 1.772461,1.772461 1.7727114,1.7727114 0 0 1 -1.772461,1.772462 1.7727114,1.7727114 0 0 1 -1.772461,-1.772462 1.7727114,1.7727114 0 0 1 1.772461,-1.772461 z m -29.0302799,0.0044 a 1.7727114,1.7727114 0 0 1 1.7724614,1.772485 1.7727114,1.7727114 0 0 1 -1.7724614,1.772461 1.7727114,1.7727114 0 0 1 -1.7724613,-1.772461 1.7727114,1.7727114 0 0 1 1.7724613,-1.772461 z m 29.0214909,7.183619 a 1.7727114,1.7727114 0 0 1 1.772461,1.772461 1.7727114,1.7727114 0 0 1 -1.772461,1.772462 1.7727114,1.7727114 0 0 1 -1.772461,-1.772462 1.7727114,1.7727114 0 0 1 1.772461,-1.772461 z m -29.0302799,0.0044 a 1.7727114,1.7727114 0 0 1 1.7724613,1.772461 1.7727114,1.7727114 0 0 1 -1.7724613,1.772461 1.7727114,1.7727114 0 0 1 -1.7724614,-1.772461 1.7727114,1.7727114 0 0 1 1.7724614,-1.772461 z m 29.0332089,7.202638 a 1.7727114,1.7727114 0 0 1 1.772462,1.772461 1.7727114,1.7727114 0 0 1 -1.772462,1.772462 1.7727114,1.7727114 0 0 1 -1.773926,-1.772462 1.7727114,1.7727114 0 0 1 1.773926,-1.772461 z m -29.0317441,0.0044 A 1.7727114,1.7727114 0 0 1 7.1063701,46.58386 1.7727114,1.7727114 0 0 1 5.3324439,48.356321 1.7727114,1.7727114 0 0 1 3.5599826,46.58386 1.7727114,1.7727114 0 0 1 5.3324439,44.811398 Z m 29.0317441,7.19385 a 1.7727114,1.7727114 0 0 1 1.772462,1.772461 1.7727114,1.7727114 0 0 1 -1.772462,1.772461 1.7727114,1.7727114 0 0 1 -1.773926,-1.772461 1.7727114,1.7727114 0 0 1 1.773926,-1.772461 z m -29.0317441,0.0044 A 1.7727114,1.7727114 0 0 1 7.1063701,53.78212 1.7727114,1.7727114 0 0 1 5.3324439,55.554582 1.7727114,1.7727114 0 0 1 3.5599826,53.78212 1.7727114,1.7727114 0 0 1 5.3324439,52.009659 Z m 72.1523601,6.682619 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936524 1.9363469,1.9363469 0 0 1 -1.936523,1.936524 1.9363469,1.9363469 0 0 1 -1.936523,-1.936524 1.9363469,1.9363469 0 0 1 1.935061,-1.936524 z m -37.795907,5.560548 a 1.0908993,1.0908993 0 0 1 1.089844,1.091309 1.0908993,1.0908993 0 0 1 -1.089844,1.091309 1.0908993,1.0908993 0 0 1 -1.091309,-1.091309 1.0908993,1.0908993 0 0 1 1.091309,-1.091309 z m 37.807622,1.625977 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936524 1.9363469,1.9363469 0 0 1 -1.936523,1.936524 1.9363469,1.9363469 0 0 1 -1.936523,-1.936524 1.9363469,1.9363469 0 0 1 1.935053,-1.936524 z m -37.807622,1.980469 a 1.0908993,1.0908993 0 0 1 1.091309,1.091309 1.0908993,1.0908993 0 0 1 -1.091309,1.091309 1.0908993,1.0908993 0 0 1 -1.091309,-1.091309 1.0908993,1.0908993 0 0 1 1.091309,-1.091309 z m 0.01611,3.597657 a 1.0908993,1.0908993 0 0 1 1.091309,1.091309 1.0908993,1.0908993 0 0 1 -1.091309,1.091309 1.0908993,1.0908993 0 0 1 -1.091309,-1.091309 1.0908993,1.0908993 0 0 1 1.091309,-1.091309 z m 37.801769,1.631837 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.935061,1.936521 1.9363469,1.9363469 0 0 1 -1.935061,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,-1.936523 1.9363469,1.9363469 0 0 1 1.935061,-1.936521 z M 39.650811,75.06043 a 1.0908993,1.0908993 0 0 1 0.0015,0 1.0908993,1.0908993 0 0 1 0.03955,0 1.0908993,1.0908993 0 0 1 1.091308,1.09131 1.0908993,1.0908993 0 0 1 -1.091308,1.089841 1.0908993,1.0908993 0 0 1 -1.089844,-1.089841 1.0908993,1.0908993 0 0 1 1.048828,-1.09131 z m 0.04102,3.609376 a 1.0908993,1.0908993 0 0 1 1.091308,1.09131 1.0908993,1.0908993 0 0 1 -1.091308,1.08984 1.0908993,1.0908993 0 0 1 -1.089844,-1.08984 1.0908993,1.0908993 0 0 1 1.089844,-1.09131 z m 37.804692,1.617188 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.93506 1.9363469,1.9363469 0 0 1 -1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.935061,-1.936523 1.9363469,1.9363469 0 0 1 1.933591,-1.93506 z m -0.0059,7.220214 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.93653,-1.936523 1.9363469,1.9363469 0 0 1 1.93506,-1.936523 z m 0.01172,7.186524 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.936523,1.936523 1.9363469,1.9363469 0 0 1 -1.936523,1.93653 1.9363469,1.9363469 0 0 1 -1.936523,-1.93653 1.9363469,1.9363469 0 0 1 1.935061,-1.936523 z m 0.01025,7.211428 a 1.9363469,1.9363469 0 0 1 0.0015,0 1.9363469,1.9363469 0 0 1 1.93506,1.93653 1.9363469,1.9363469 0 0 1 -1.93506,1.93652 1.9363469,1.9363469 0 0 1 -1.936523,-1.93652 1.9363469,1.9363469 0 0 1 1.93506,-1.93653 z" stroke-width="0.451995" gorn="0.4" id="rect1313"/>
    <g  transform="matrix(0.70710436,0.70710436,-0.70710436,0.70710436,77.135152,32.247488)">
        <g >
            <g  gorn="0.5.0.0" id="breadboard">
                <g  transform="rotate(-45,-0.35874911,109.23455)">
KjellMorgenstern commented 1 year ago

@KjellMorgenstern I have placed Infineon logo in fritzing-parts\bins\more folder, is that ok? if not can you provide me your requirement

The logo should look good in 32x32 pixel resolution. To be future proof, including a higher resolution is possible, but right now Fritzing can only render the tiny icon. Something like the symbol used their circuits would work much better: image

I'll try to contact the brand department, but if you can get me in touch with someone that would be great.

janaifx commented 1 year ago

@KjellMorgenstern i have updated the file (added layer id) can you run the script?

janaifx commented 1 year ago

@KjellMorgenstern regarding the logo, i will discuss with the team and get back to you soon

KjellMorgenstern commented 1 year ago

@janaifx Did you find out anything about the logo? If not, this is not a blocker, since the part doesn't need its own bin, and the logo would be used for that. It could make sense if you plan to add more parts from Infineon, though.

janaifx commented 1 year ago

@KjellMorgenstern i have sent mail to you regarding Infineon logo. kindly have a look...

janaifx commented 1 year ago

@KjellMorgenstern kindly update me the status of publishing Infineon logo and Fritzing boards

KjellMorgenstern commented 1 year ago

The infineon logo is not usable as a bin icon, just remove it. We would need something like https://fontawesome.com/search?o=r&f=brands .

The part would then be discoverable via the search function. Maybe it would also make sense to add it to the "Output" bin... there is a Pololu motor driver there as well.

janaifx commented 1 year ago

@KjellMorgenstern i have removed it. as said in mail,I’m working with the concern team for the logo, will get back to you if I have any information. I will upload other boards also in the upcoming weeks.

janaifx commented 1 year ago

@KjellMorgenstern Is the H-Bridge KIT2GO files are reflected in Fritzing tool?

janaifx commented 1 year ago

Hello @KjellMorgenstern i have sent you Infineon logo with 32px resolution in mail. kindly publish H-BRIDGE-KIT2GO in part tab Infineon section.

janaifx commented 1 year ago

Hi @KjellMorgenstern i have added one more board. can you please run the scripts...

KjellMorgenstern commented 1 year ago

@janaifx before adding more boards, please lets finish this PR

janaifx commented 1 year ago

@KjellMorgenstern what is PR? let me know when to add boards. And do you have any update on the logo/creating Infineon part tab in Fritzing?

KjellMorgenstern commented 1 year ago

PR is short for "pull request". The logo is not the problem, but right now some of the checks are failing with the new board, click on Details to see why.

janaifx commented 1 year ago

@KjellMorgenstern i have updated the file. please run the scripts. Thanks :)

janaifx commented 1 year ago

@KjellMorgenstern please run the scripts

janaifx commented 1 year ago

@KjellMorgenstern can you please run the scripts again

janaifx commented 1 year ago

@KjellMorgenstern 3 check is passed but no idea about the 4th test -> check-all-parts / golang-scripts (pull_request). can you please let us know what it is?

janaifx commented 1 year ago

@KjellMorgenstern i have updated FZP files also. kindly run the scripts once again

janaifx commented 1 year ago

@KjellMorgenstern can you please run the scripts once again?

janaifx commented 1 year ago

@KjellMorgenstern kindly let me know when we can see Infineon board in Fritzing tool...

janaifx commented 1 year ago

Hi @KjellMorgenstern do i have any update? when can we see Infineon board in Fritzing tool?...

KjellMorgenstern commented 1 year ago

I get a lot of warnings from QSvg. In Infineon_MY_IOT_ADAPTER_breadboard.svg there are 315 warnings. 

000: Element ID: 'text26', Problem: <a href="problem:14581-14987">attribute is defined on both inline style and inline PA: font-family</a>
     Source code, up to line 26, col 422, chars 14581-14987: '<g text-anchor="start"  gorn="0.4.0.8.1" stroke-width="0" stroke="none" id="text26" font-family="OCRA" fill="#ffffff" style="font-style:normal;font-variant:normal;font-weight:normal;font-stretch:normal;font-size:3.5px;font-family:Droid Sans;-inkscape-font-specification:\'Droid Sans, Normal\';font-variant-ligatures:normal;font-variant-caps:normal;font-variant-numeric:normal;font-variant-east-asian:normal">'

The font-family is defined twice in each element, once as OCRA, once as Droid Sans. Fritzing will take the font-familiy attribute (OCRA) , and use the font-size from the style attribute (3.5px) . But this is for sure not an reliable approach and likely to cause problems with other tools or future Fritzing versions.

For example, when I run "scour" on the SVG, which reduces size (and parsing time) by half, it will give preference to the Droid Sans font from the style attribute.

So it is better to fix this warning.

How do you generate these font-family and style attributes?

janaifx commented 1 year ago

Hello Kjell,

Please find the attached updated files FYA.

Do I need to upload this files in GitHub? Kindly revert back and let me know what ais the next step.

And please update the status of Infineon_H-BRIDGE_KIT2GO files, is this visible in Fritzing tool?

Thanks & Regards Jana

Janarthanan Nagarajan

Infineon Technologies India Pvt. Ltd. IFIN DES DOS SOC PCB Office: +91 80 2513 1559 Fax: +91 (80) 2513 1212 @.**@.>

From: Kjell @.> Sent: 08 December 2022 14:09 To: fritzing/fritzing-parts @.> Cc: Janarthanan Nagarajan (IFIN DES DOS SOC PCB) @.>; Mention @.> Subject: Re: [fritzing/fritzing-parts] Infineon boards (PR #349)

Caution: This e-mail originated outside Infineon Technologies. Do not click on links or open attachments unless you validate it is safehttps://intranet-content.infineon.com/explore/aboutinfineon/rules/informationsecurity/ug/SocialEngineering/Pages/SocialEngineeringElements_en.aspx.

I get a lot of warnings from QSvg. In Infineon_MY_IOT_ADAPTER_breadboard.svg there are 315 warnings.

000: Element ID: 'text26', Problem: attribute is defined on both inline style and inline PA: font-family

 Source code, up to line 26, col 422, chars 14581-14987: '<g text-anchor="start"  gorn="0.4.0.8.1" stroke-width="0" stroke="none" id="text26" font-family="OCRA" fill="#ffffff" style="font-style:normal;font-variant:normal;font-weight:normal;font-stretch:normal;font-size:3.5px;font-family:Droid Sans;-inkscape-font-specification:\'Droid Sans, Normal\';font-variant-ligatures:normal;font-variant-caps:normal;font-variant-numeric:normal;font-variant-east-asian:normal">'

The font-family is defined twice in each element, once as OCRA, once as Droid Sans. Fritzing will take the font-familiy attribute (OCRA) , and use the font-size from the style attribute (3.5px) . But this is for sure not an reliable approach and likely to cause problems with other tools or future Fritzing versions.

For example, when I run "scour" on the SVG, which reduces size (and parsing time) by half, it will give preference to the OpenSans style.

So it is better to fix this warning.

How do you generate these font-family and style attributes?

— Reply to this email directly, view it on GitHubhttps://github.com/fritzing/fritzing-parts/pull/349#issuecomment-1342272828, or unsubscribehttps://github.com/notifications/unsubscribe-auth/A3E7NJEW43XOYIZSBY2NBQLWMGNCTANCNFSM6AAAAAAQQ5GGSA. You are receiving this because you were mentioned.Message ID: @.**@.>>

janaifx commented 1 year ago

@KjellMorgenstern thanks for your feedback/reply. I have sent you the updated files in mail. kindly have a look and do the needful. If possible, kindly share us the standards you follow for Fritzing files, we will follow the same for upcoming boards.

janaifx commented 1 year ago

@KjellMorgenstern do i have any update on the publish process?

KjellMorgenstern commented 1 year ago

I have cleaned up some files. Main issues resolved:

Tools used: scour (https://github.com/scour-project/scour) , removegorn.py (from this repo) , text editor.

Remaining issue:

1. breadboardbreadboard In the fzp, all connectors are on "breadboardbreadboard" layer, which is a special layer for breadboards in the breadboard view.

In the breadboard svg, only a "breadboard" layer is defined. While Fritzing might tolerate the mismatch, this can lead to further errors!

Since the board is not a breadboard, I think it makes sense to map connectors to the "breadboard" layer (meaning, the regular layer on the breadboard view), not the "breadboardbreadboard" layer.

2. Fritzing version The version specified is currently 0.5.2. I don't think this files was created or ever opened with Fritzing 0.5.2 We should bumb the version to what the files was tested with, probably Fritzing 0.9.10 on your side?

janaifx commented 1 year ago

@KjellMorgenstern

  1. I will avoid the breadboardbreadboard issue in the upcoming boards.
  2. Yes i'm using Fritzing 0.9.10; should i use Fritzing 0.5.2? if so kindly provide me the download link in mail

and regarding the cleanup using scour , i'm planning to run the script before i add the files in the Fritzing repository.

what usage command i should use? "Standard"? image

KjellMorgenstern commented 1 year ago

Looking at this again, I think the board may use the "breadboardbreadboard" layer. At least, Arduino UNO boards do the same. There is a slight difference on how connectors will behave. But most important is that layer names in the fzp and the svg file match.

Probably the 0.5.2.x version is just there because the file was copied from a different part. Just change it to 0.9.10.

Scour params to try: --create-groups --indent tab --strip-xml-space --enable-id-stripping --protect-ids-prefix conn,bread,copper,silk,pcb,schematic,icon Edit: If you use non standard IDs for connectors or layers, remember to include them in the protected ids prefix list. In doubt, just do not enable id stripping.

Before running scour, you can run the "remove gorn" script. That will remove a lot of unnecessary data inserted from Fritzing, and enable scour to work better.

PS: We know this is quite a complicated process, and are developing improvements.

janaifx commented 1 year ago

@KjellMorgenstern I have run "remove gorn" script and this is what i got image no clarity what option i should select. please help...

And i tried Scour params --create-groups --indent tab --strip-xml-space --enable-id-stripping --protect-ids-prefix and blow image is the result image is this correct?

KjellMorgenstern commented 1 year ago

The remove gorn script is a separate script int the fritzing-parts repo

janaifx commented 1 year ago

@KjellMorgenstern i hope all the issues are resolved. let me know when can i see the Infineon boards in Fritzing tool

janaifx commented 1 year ago

Hi @KjellMorgenstern. let me know the status... where are we now?

janaifx commented 1 year ago

Hello @KjellMorgenstern i would like to know the status. can we have a short call?

KjellMorgenstern commented 1 year ago

The Infineon_MY_IOT_ADAPTER.fzp was using<layer layerId="breadboardbreadboard"/>, but in the SVG there was only a breadboard layer defined for the connectors. It is ambiguous which layer was intended. Since this board is not really a breadboard, I set it to single "breadboard", not the duplicated "breadboardbreadboard". @vanepp Can you comment? Is there a use case for boards like this to have connectors in the "breadboardbreaboard" layer? This can be quite confusing, I blame the original choice of names.

KjellMorgenstern commented 1 year ago

Merging this now. @janaifx This should enable the CI pipeline to run automatically for future PRs.

vanepp commented 1 year ago

The Infineon_MY_IOT_ADAPTER.fzp was using , but in the SVG there was only a breadboard layer defined for the connectors. It is ambiguous which layer was intended. Since this board is not really a breadboard, I set it to single "breadboard", not the duplicated "breadboardbreadboard". @vanepp Can you comment? Is there a use case for boards like this to have connectors in the "breadboardbreaboard" layer? This can be quite confusing, I blame the original choice of names.

Yes there is a use case for breadboardbreadboard without the rest of the stuff needed for a real breadboard. The Arduinos use this so that you can move the Arduino to the the same level as the breadboard (I assume but don't know for sure, this is to allow shields perhaps, it was done before I came to Fritzing and I only figured out what it does a year or so ago.) That said, the layerId in the fzp file needs to be breadboardbreadboard to match the svg or the part will not export as an image (svg, jpg png etc.) in Fritzing the part will be missing in the image (but work fine elsewhere in Frtizing). If you like I can see if I remember how to extract files from a pull request and run this part through FritzingCheckPart.py and see if anything else turns up or I see anything else that needs correcting such as scaling, meeting the graphics standards and the like.

vanepp commented 1 year ago

So after fighting a losing battle with github about local repository updates, I ran a development version of FritzingCheckPart.py against your part. It finds quite a few issues (and a number of errors!) The modified lines aren't of great concern, they replaced a 0 width terminalId with a non zero value (Fritzing used to have a problem with this but I think it got fixed a version or 2 back.) More of a problem (thus the Error as it is wrong) are the pcb connectors with ellipses instead of circles. With an ellipse no hole will be generated in the gerber output for any of these pads making pcb incorrect.

I think that Kjell fixed the px on font size being complained about here, but there are still some in the current files for the part. Now I will have a look at the files in the part (which I haven't yet) and see if I see any more problems.

FritzingCheckPart.py output: (edited for size!)

...

Modified 1: File 'core/../svg/core/breadboard/Infineon_MY_IOT_ADAPTER_breadboard.svg.bak' At line 17

Removed px from font-size leaving 3.5

Modified 1: File 'core/../svg/core/breadboard/Infineon_MY_IOT_ADAPTER_breadboard.svg.bak' At line 28

Removed px from font-size leaving 3.5

Modified 1: File 'core/../svg/core/breadboard/Infineon_MY_IOT_ADAPTER_breadboard.svg.bak' At line 393

...

'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 412

Connector connector51terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 418

Connector connector49terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 424

Connector connector76terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 429

Connector connector79terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 432

Connector connector86terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 438

Connector connector87terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 444

Connector connector88terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 450

Connector connector89terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 456

Connector connector90terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 462

Connector connector91terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 468

Connector connector61terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 474

Connector connector60terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 480

Connector connector55terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 485

Connector connector72terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 488

Connector connector54terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 494

Connector connector53terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 500

Connector connector64terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 506

Connector connector63terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 515

Connector connector78terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Modified 2: File 'core/../svg/core/schematic/Infineon_MY_IOT_ADAPTER_schematic.svg.bak' At line 519

Connector connector80terminal had a zero width, set to 10 Check the alignment of this pin in the svg!

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 71

Connector connector70pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 76

Connector connector86pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 91

Connector connector78pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 96

Connector connector62pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 113

Connector connector18pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 123

Connector connector73pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 153

Connector connector77pin has no radius no hole will be generated

Error 74: File 'core/../svg/core/pcb/Infineon_MY_IOT_ADAPTER_pcb.svg.bak' At line 159

Connector connector35pin has no radius no hole will be generated

vanepp commented 1 year ago

Hopefully this is still active (it has disappeared from view but is still letting me comment!)

There are a number of problems with the part as it stands. Here is a detailed look at the part and what I did to fix it up.

Breadboard

svg doesn't start at 0, 0 will cause slight (probably unnoticable) offset from the grid. Scale is not the desired value breadboard group only contains the base path, unwanted icon group (outside of breadboard) contains most of the part.

capture

So in Inkscape ungroup both groups completely (which removes most transforms which is desirable and is required for scaling to work correctly.) Then Edit->Select all, Edit-> Resize page to selection to reset the viewbox origin to 0 0 as desired. Set width locked to height (to keep cirlces circles during rescaling!) set dimensions to px for max resolution and copy the width to reset the scale later. Enable scale stroke-width.

capture1

Then change the scale from 0.013888 to 0.001

capture2

which changes the scale but shrinks the drawing and reduces the width. Now copy the width back in to the tool bar to finish the rescale

capture3

now the scale is correct, the image size is correct (and starts at 0 0 as it should) and the view box is 1000 x the height and width making drawing units 1/1000 of an inch. So at this point do a Object->group and set the id to be breadboard (to match this line in the .fzp file)

     <layers image="breadboard/Infineon_MY_IOT_ADAPTER_breadboard.svg">
      <layer layerId="breadboard"/>
     </layers>

optionally (because I have a script which will renumber pins in an svg with this format) move all the connectors in order to the bottom of the svg from this

capture4

to this

capture5

this is mostly a help on new parts (I can move the pads in to the correct order, set connector0pin and the script will rename all the remaining pins for me!) Then save File->save as and set plain svg to save the modified breadboard svg. At this point I made a new part to try it in Fritzing, but didn't run FritzingCheckPart.py. The px in font size not being removed causes issues (either too large fonts such as here, or font size 0

capture6

running the part through checkpart fixes that

**** Starting to process file svg.pcb.Infineon_MY_IOT_ADAPTER_pcb.svg.bak

File 'part.Infineon_MY_IOT_ADAPTER_1.fzp.bak'

This is a through hole part as both copper0 and copper1 views are present. If you wanted a smd part remove the copper0 definition from line 47

Modified 1: File 'svg.breadboard.Infineon_MY_IOT_ADAPTER_breadboard.svg.bak' At line 68

Removed px from font-size leaving 48.6071

Modified 1: File 'svg.breadboard.Infineon_MY_IOT_ADAPTER_breadboard.svg.bak' At line 73

Removed px from font-size leaving 48.6071

capture7

Here I made a connection to a header in breadboard to illustrate one of the warnings checkpat raised: no terminalId in schematic.

capture8

That lack causes the wire to connect in the middle of the pin (rather than the end where the terminalId should be.) As well the stroke for the text is not the #555555 specified in the graphics standards and is thus too light. In actual fact, you have a terminalId but it is 0 width and the bug isn't yet fixed in 0.9.10 it appears as the terminalId isn't being recognized ( only ran the breadboard svg through checkpart the other svgs are as they are in the repository.) 

        <rect
          id="connector72pin"
          y="143.65"
          width="14.4"
          height=".7"
          stroke-width="0"
          connectorName="AREF"
        />
        <rect
          id="connector72terminal"
          y="143.65"
          width="10"
          height=".7"
          stroke-width="0"
        />

and your fill should as noted be #555555 not #8c8c8c as it is.

      <text
        x="15.8"
        y="144.69556"
        fill="#8c8c8c"
        font-family="OCRA"
        font-size="3.5">AREF</text>

In pcb it turns out the errors about missing holes are in fact false alarms.

capture9

the connector connector70pin is a rectangle (and thus no radius and no hole) but connector70pad (which shouldn't exist!) is in fact a circle at the same place and thus a hole will be drilled there. It is preferable to only use connector labels on actual connectors to avoid issues like this one.

On to schematic.Here I have upgraded schematic to meet the graphics standards abd part file format documents.

https://fritzing.org/fritzings-graphic-standards

https://github.com/fritzing/fritzing-app/wiki/2.1-Part-file-format

Essentially space is valuable in schematic and thus the part wants to be as small as it can be. So connectors should be 0.1in long and have a color of #555555 (your schematic looks to be based on one of the Arduinos which are old and haven't been updated and use older conventions) This pin needs several changes, I previously edited the svg with a text editor and changed the colors to match the graphics standards and changed most stroke-widths to 10 globally in the svg file. Normally I would create a new schematic using Randy's Inkscape Fritzing schematic extension but that would require changing the pin numbering so I chose to do this manually instead. Starting with connector85 on the top it is desirable that the length be 0.105in rather than the currect 0.205in and the x coord be 13in rather than 1.295in to align correctly to the 0.1in grid.

capture10

So change the lenght

capture11

now another optional change. We don't need two drawing elements for the connector, 1 will do fine (and make the svg slightly smaller and less confusing!) so rename line203 connector85pin and delete the rectangle that is currently connector85 pin.

capture12

rename line203 to connector85pin

capture13

then delete rect1277 and move on to the associated terminalId. Here the height and width need to change to 10 and the stroke-width to 0 and the x coord to 1.3in to match connector85pin (note the rect is gone!)

capture14

That produces the desired terminalId centered on the curve of the end of the pin so the wire connects correctly.

capture15

Now the boring part of repeating this for all the rest of the pins (at some point I will probably make a script to automate this but haven't yet.) Once the entire side is done I select all the connectors and move them down 0.1in to save a bit of space like this

capture16

after that move the text a small amount in x to align it with the center of the pins from this

capture17

to this

![capture18](https://user-images.githubusercontent.com/165

this to is optional (the part will work fine without it) but it looks better. In the end schematic now looks like this (with all the pins moved to the bottom of the svg) but not yet resized or grouped. The changes have cut almost an inch of space off each side leaving more space in schematic for other parts.

capture19

when Edit-.select all, Edit->resize page to selection and Object->group then the group id set to schematic we get the final schematic svg. Filr->save as as plain svg completes schematic.

capture20

Now on to pcb. The scale is wrong and the origin isn't at 0 0, so ungroup and rescale.

capture21

The first item of business is to correct the connectors so they refer to circles. Thus connector0pad becomes connector0pin (the fzp file will need to be updated as well.) The next is to set the circle to be appropriate for a 0.1in header which means the stroke-width wants to change to 20 (to give a 20 thou ring thinkness) and the radius wants to change to 29 to produce a 0.038in hole (in Inkscape hole size = pad diameter - (2 * stroke-width)

capture22

Note the pad diameter is 0.078in so the hole size is 0.038in (0.078 - (2 * 0.02)) Now we need to do the same for all the other pads and then adjust the squares (and probably more pin names.) To do that I will edit the svg file with at text editor and do group changes.

capture23

at the end of it all pcb looks like this with the pins numbered in order (and all changed from pad to pin) with the rectangles for those pins with one above them (and not called connector anything.) Save the svg and move on to the fzp file.

capture24

Change the Fritzing version to 0.9.10 change the moduleId to Infineon_MY_IOT_ADAPTER_1 (where 1 is the version number)

change the version to 1

add the version number to the svg file names

changed pad to pin globally on the connectors as the pcb svg was modified to that. I left the pin types as female, notmally male is used (which will connect to the breadboard) female is usually used for pins that will short if attached to the breadboard. Since that is likely here if you placed this on a breadboard for somee reason I left them like that. That looks to be about the only changes needed in the .fzp file. Ran the resulting file through FritzingCheckPart.py which indicates (correctly!) that termminalIds in schematic are missing starting with connector16 so go add the terminalIds. It also indicates bus node member connectors don't exist so check and update the bus definitions. OK the bus definition is for pins that connect together internally (and I don't know what they are here so this may be wrong and you may need to change it or add to it. I assumed the grn and power pins are all commont (which may or may not be correct) to set this bus defiinition up. I have found a board schematic in the user manual. That should allow me to make a complete bus definition (as it should show what pins are connected internally together.) Someone how knows how the board works needs to verify that my assumptions are correct though the scehmatic is somewhat confusing as socket1 shares "no outer pins" and it isn't clear what outer pins are. SDA and SCL appear to be shared for instance.

GND

0 56 83 84

GND_FLT

6 23 40

5V

1 18 35 71 75 82

3V3

7 24 41 73 77 81

IOREF

76 79

AREF

55 72

SCL_LS

53 91

SCL

5 22 39

SDA_LS

54 90

SDA

4 21 38

AN1

19 36

AN2

20 37

GPIO3

25 42

GPIO4

26 43

RX

17 34 51

TX

16 33 50

RST

32 49

GPIO1

31 48

CS

30 47

SCK

12 29 46

MOSI

11 28 45

MISO

10 27 44

As part of looking at this I changed schematic a bit to split out the power jumpers for AREF and IOREF. Here you can connect the pin (AREF or IOREF) to the power source of choice.

capture25

with that change made FritzingCheckPart.py only complains a bit and they are all warnings which can be ignored.

$ FritzingCheckPartw.py part.Infineon_MY_IOT_ADAPTER_1.fzp

**** Starting to process file Startup, no file yet

**** Starting to process file part.Infineon_MY_IOT_ADAPTER_1.fzp

**** Starting to process file svg.breadboard.Infineon_MY_IOT_ADAPTER_1_breadboard.svg.bak

**** Starting to process file svg.schematic.Infineon_MY_IOT_ADAPTER_1_schematic.svg.bak

**** Starting to process file svg.pcb.Infineon_MY_IOT_ADAPTER_1_pcb.svg.bak

File 'part.Infineon_MY_IOT_ADAPTER_1.fzp.bak'

This is a through hole part as both copper0 and copper1 views are present. If you wanted a smd part remove the copper0 definition from line 47

Warning 6: File 'part.Infineon_MY_IOT_ADAPTER_1.fzp.bak' At line 2

ReferenceFile name

'Arduino_ADK_MEGA_2560-Rev3(fix).fzp'

Doesn't match fzp filename

'Infineon_MY_IOT_ADAPTER_1.fzp'

Warning 11: File 'part.Infineon_MY_IOT_ADAPTER_1.fzp.bak' At line 57

Type female is not male (it usually should be)

Now create a part and test it. When it passes (as this one does) run DRC to make sure DRC is happy then export the sketch to gerbers and check the output in a gerber viewer to insure that all is well (gerber processing happens after rendering it Fritzing and sometimes has bugs!)

capture26

This is the test sketch that these images were created from (remove the trailing .zip to get the .fzz file for Fritzing)

Infineon_MY_IOT_ADAPTER-improved-test-Sketch.fzz.zip

Infineon_MY_IOT_ADAPTER-improved-test-Sketch.fzz

gerber output. Things to check all the silkscreen paths render correctly all the pads have drill holes and the holes are the expected size, edit the drill.txt file and check these lines:

; NON-PLATED HOLES START AT T1 ; THROUGH (PLATED) HOLES START AT T100 M48 INCH T100C0.038000 % ...

in this case all holes are 0.038in as desired. The gerber output displayed in gerbv

capture27

here is the above part in fzpz format (remove the trailing .zip which is to keep github happy and uncompress the .fzpz file to get the fzp and 4 svg files for the part.

Infineon_MY_IOT_ADAPTER-improved.fzpz.zip

Pretty much all that I did here is covered in this tutorial set on making parts if you haven't seen it

https://forum.fritzing.org/t/part-creation-howto-part-1-breadboard-and-pcb/7692

If you have questions you can ask them here (although I only get here occasionally) or for a faster response post in the fritzing forums at

https://forum.fritzing.org/

Hope this helps!