furrtek / DMG-CPU-Inside

Reverse-engineered schematics for DMG-CPU-B
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First input of GEDO is wrong #42

Open msinger opened 3 years ago

msinger commented 3 years ago

On page 18, the first input of the AND gate GEDO is wrongly connected to BUFY_256Hz. It should be connected to the Q output of the DTFF FEXU.

I noticed that the "length timer" circuit at the bottom of page 18 only had inputs, but not even a single output. This would render it useless. Now, with FEXU signaling GEDO it is able to disable the wave player after the length timer overflows.