Closed jburks closed 1 year ago
When the y_counter_r register was widened to 10 bits to prevent this from happening in VGA mode, the irqline check for composite mode was not also widened resulting in a 7-bit check of bits [8:1].
When the y_counter_r register was widened to 10 bits to prevent this from happening in VGA mode, the irqline check for composite mode was not also widened resulting in a 7-bit check of bits [8:1].