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g2384 / VHDLFormatter

VHDL formatter web online written in typescript
https://g2384.github.io/VHDLFormatter/
MIT License
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Indent trailing broken lines #41

Closed Nabav closed 3 years ago

Nabav commented 3 years ago

I would like to ask for a formatting improvement regarding breaking long lines in VHDL. It would be much nicer, if the broken lines after the first line of the statement get an extra indentation level.

Suppose this formatted example:

    constant ALMOST_EMPTY_OFFSET : bit_vector(12 downto 0) :=
    to_bitvector(std_ulogic_vector(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));
    constant ALMOST_FULL_OFFSET : bit_vector(12 downto 0) :=
    to_bitvector(std_ulogic_vector(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));

I think this is the preferred output:

    constant ALMOST_EMPTY_OFFSET : bit_vector(12 downto 0) :=
        to_bitvector(std_ulogic_vector(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));
    constant ALMOST_FULL_OFFSET : bit_vector(12 downto 0) :=
        to_bitvector(std_ulogic_vector(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));

The current formatting style gives me the sense that they are two statements in two lines, but with the extra indentation, it seems that the same statement is broken into two (or more) lines.

Of course, the implementation seems not easy to me, since trying to find the semicolon ; as the terminating character might not work in loops.

g2384 commented 3 years ago

So far it can do this:

input

CONSTANT ALMOST_EMPTY_OFFSET : bit_vector(12 DOWNTO 0)
:= to_bitvector(STD_ULOGIC_VECTOR(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));
CONSTANT ALMOST_FULL_OFFSET : bit_vector(12 DOWNTO 0)
:= to_bitvector(STD_ULOGIC_VECTOR(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));

output

CONSTANT ALMOST_EMPTY_OFFSET : bit_vector(12 DOWNTO 0)
 := to_bitvector(STD_ULOGIC_VECTOR(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));
CONSTANT ALMOST_FULL_OFFSET : bit_vector(12 DOWNTO 0)
 := to_bitvector(STD_ULOGIC_VECTOR(to_unsigned(C_M_AXI_BURST_LEN - 1, 13)));
g2384 commented 3 years ago

this bug should be fixed now. Please check.