The alignment in sets is not done properly.

[goglecm]

When assigning a set to a signal/variable, the contents "inside" the set are not aligned properly. Here is an example original code.

architecture behaviour of A_ARITH_MOD is
    signal sOperandInStatus : data_status_vector((S_ALU_INPUTS - 1) downto 0)         := (others => INIT_DATA);
begin
    -- Output connections
    main : process
    begin
            sStatusOut <= (2 => DR_ONE, 5 => DR_ZERO, 7 => DR_ONE, others => DR_EMPTY);
            sStatusIn <= (32 => DR_ONE, 56 => DR_ZERO, 17 => DR_ONE, 5 => DR_ZERO, 7 => DR_ONE, others => DR_EMPTY);
            localStatusRegister := (9 => DR_ONE, 13 => DR_ONE, others => DR_ZERO);
            sResultOut <= (others => (others => DR_EMPTY));
    end process main;
end architecture behaviour;

gets formatted to

architecture behaviour of A_ARITH_MOD is
    signal sOperandInStatus : data_status_vector((S_ALU_INPUTS - 1) downto 0) := (others => INIT_DATA);
begin
    -- Output connections

    main : process
    begin

        sStatusOut <= (2          => DR_ONE, 5 => DR_ZERO, 7 => DR_ONE, others => DR_EMPTY);
        sStatusIn  <= (32          => DR_ONE, 56 => DR_ZERO, 17 => DR_ONE, 5 => DR_ZERO, 7 => DR_ONE, others => DR_EMPTY);
        localStatusRegister := (9 => DR_ONE, 13 => DR_ONE, others => DR_ZERO);
        sResultOut <= (others     => (others => DR_EMPTY));
    end process main;

end architecture behaviour;

The issue is the long space after 2 and 32. I see no valid reason for it to be there. A good idea to fix the issue is to treat the set separately.

So the set spacing may look like this after it is formatted: (32 => DR_ONE, 56 => DR_ZERO, 17 => DR_ONE, 5 => DR_ZERO, 7 => DR_ONE, others => DR_EMPTY) However the common assignemnt signs ( "<=" or ":=" ) as well as the starting set braket "(" of sequential statements can be alligned. (This is implemented already by the looks of it).

I hope this makes sense. Let me know if more details are needed.

[g2384]

Fixed. It will do this:

a    <= (2 => DR_ONE, 5 => DR_ZERO);
bcde <= (23333 => DR_ONE);