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g3gg0 / ESP32_CRSFSniffer

MIT License
65 stars 16 forks source link

convert part of the project #6

Open gc9n opened 6 months ago

gc9n commented 6 months ago

i am trying to make the same thing on another LORA chip and another Host chip STM32L4 , can you share in high level what exactly the timer does

g3gg0 commented 6 months ago

i am counting the time that passes from a packet on slot 0 to a packet on slots 1..n and from that timing i can reconstruct the channel sequence, as it is repeating.

gc9n commented 6 months ago

if i dont want to get all the info of telemetry and stuff , just a couple of bytes of the transmitter , do i have to mimic the hopping frequency dance of the TX? i mean if i stay steady on a single Freq say 860 , is it possible to fill my receiver buffer?

gc9n commented 5 months ago

Interesting , with SFK modem mode , preamble length 8 No CRC Header type fix len sync word length 1 the Chip is stable on 860000hz no hoping follow , is fixed

and when i power on the CRSF TX and CRSF RX i get this messages , i wonder if they are just garbages

55 55 44 4D 64 48 88 91 AA 29 2A 44 76 EA 80 D3 49 4C AA 92 A5 16 AA 55 55 4D D2 44 88 8D 1A A2 52 A4 EA 96 B2 7D F6 A6 AA 92 A5 3A AA 2B 55 55 46 4D 64 C8 8A 91 2B 25 0A 5E ED EB 6E 9A 5A F8 E9 2A D7 AA A2 55 55 44 4D 64 C8 88 99 F2 96 85 A3 32 5A 8B D1 5A 5D 55 0D 4A 75 54 55 55 11 35 91 22 22 4A AD 9D 52 76 4B 53 12 69 29 D5 52 54 AE 55 4D 55 55 44 4D 64 49 88 52 2B 21 0B 46 44 B5 10 A6 92 90 55 25 4A 55 56 55 55 11 35 91 22 23 4E 94 94 A9 58 B7 68 9D 24 94 CA A9 2A 52 AA A2