This changes PLIC to comply with the RISCV PLIC Spec. Only necessary change was the control registers addresses.
Also, while developing software, got caught up in a corner case with the C extension.
When the last instruction in the instruction mem was a JALR, the ALIGN stage from the pipeline got blown up, because, as the PC kept going forward, when the JALR got taken in the EXEC stage, the ALIGN stage was filled with undefined values, thus breaking the PC_ADD logic.
This fixes this extremely rare case by flushing the ALIGN stage when a JUMP is detected
This changes PLIC to comply with the RISCV PLIC Spec. Only necessary change was the control registers addresses. Also, while developing software, got caught up in a corner case with the C extension.