gaph-pucrs / RS5

RV32I[M][C][V][_Zihpm][_Zkne][_Xosvm]_Zicsr processor
MIT License
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Branch prediction #5

Closed Willian-Nunes closed 1 year ago

Willian-Nunes commented 1 year ago

This implements static branch prediction. It takes an instruction and its PC and determines if it's a branch or a jump and calculates its target. For jumps it will always predict taken. For branches it will predict taken if the PC offset is negative.

Improved performance by about 14%.

Coremark ticks for an iteration W/o Branch Prediction --> 13090 With Branch Prediction --> 11467

Coremark Iterations per second W/o Branch Prediction --> 76 With Branch Prediction --> 87

Normalized performance score is now 0.872 iterations/Mhz, this is similar to IBex core that has a normalized performance score of about 0.904 Iterations/Mhz.

Comparing with 1.0.0 version (TCC release) that presented 0.670 Iterations/Mhz the RS5 core improved a lot in performance until now (about 30%) with branch prediction mechanism and with one stage forwarding.

Willian-Nunes commented 1 year ago

with branch prediction image image

Without image image

Not a big area overhead but inserted timing problems.

TO DO: Study a better way to overcome timing issues.

Willian-Nunes commented 1 year ago

This method presented bad timing and was replaced by a more efficient with new decoder