Cleanup and making it work again

[justburner]

Changes:

• Reverted back to the last working commit.
• The project file "mega65.xise" is now the main project to compile the mega65 on Nexys 4 DDR board.
• Cleaned up dead files and moved all IP cores into ipcore_dir.
• Regenerated all IP Cores and associated them on the project properly (mega65.xise only).
• Patched makefile to pick windows platform properly (compiling from cygwin should expected to be working now).
• Using diskchoose for now until diskmenu can finally mount and exit without crashing.
• Added new targets on makefile:
  • make fpga - Create all required files to generate the bitstream.
  • make clean - Clean up unused files (Note: there still be some leftovers in ipcore_dir).
• Wrote a new simpler FPGA temperature reader (fpgatemp.vhd).
• Workaround on an issue that causes CPU to crash on first boot, old behavior can be restored by enabling switches 2 to 4.
• LEDs 10 (CPU) and 11 (Monitor) show when it's in hypervisor mode.

  Steps to generate the bitstream now:

  1. Clone "Ophis" on the parent directory.
  2. Clone this branch.
  3. Run "make fpga", make sure you have python installed!
  4. Open mega65.xise in Xilinx ISE 14.7.
  5. Double click "Generate Programming File".
  6. Wait between 1 to 3 hours (depends of how fast is your CPU).
  7. Copy "container.bit" to your SD card (Refer to the mega65 manual of how to do this).

[justburner]

Had to dance a bit around on git because i've wanted to keep this notes and also not interfere with the active branch until everyone test this stuff and say it's a-okay =)

[gardners]

Thanks for your work on this. I look forward to reading through the changes in more detail, and generally catching up on it all.

Paul.

[gardners]

We should also add Ophis as a git sub-module, then it won't need to exist in the higher level directory.