Open hansfbaier opened 1 year ago
Here is some optimization potential (I added some print statements to see what gets visited when routing backwards):
Routing net '$abc$2236$iopadmap$ddr_out0'... Routing arc 0 of net '$abc$2236$iopadmap$ddr_out0' (0, 225) -> (1, 225) ====> Route backwards src: SITEWIRE/OLOGIC_X0Y34/OQ dst: SITEWIRE/IOB_X0Y34/OUSED_OUT =====> visited wire SITEWIRE/IOB_X0Y34/O, pip SITEPIP/IOB_X0Y34/OUSED/O =====> visited wire LIOB33_X0Y33/IOB_O0, pip LIOB33_X0Y33/14.330 =====> visited wire LIOI3_X0Y33/LIOI_OLOGIC0_OQ, pip LIOI3_X0Y33/720.706 =====> visited wire SITEWIRE/OLOGIC_X0Y34/OQ, pip LIOI3_X0Y33/982.720 <================= would be finished here =====> visited wire LIOI3_X0Y33/IOI_OLOGIC0_D1, pip LIOI3_X0Y33/484.720 =====> visited wire SITEWIRE/OLOGIC_X0Y34/OMUX_OUT, pip SITEPIP/OLOGIC_X0Y34/OQUSED/OMUX_OUT =====> visited wire INT_L_X0Y34/IMUX_L34, pip LIOI3_X0Y33/261.484 =====> visited wire INT_L_X0Y34/BYP_BOUNCE0, pip INT_L_X0Y34/8.167 =====> visited wire INT_L_X0Y33/BYP_BOUNCE6, pip INT_L_X0Y34/18.167 =====> visited wire INT_L_X0Y34/WW2A1, pip INT_L_X0Y34/41.167 =====> visited wire INT_L_X0Y34/WL1BEG1, pip INT_L_X0Y34/70.167 =====> visited wire INT_L_X0Y34/WR1BEG1, pip INT_L_X0Y34/80.167 =====> visited wire INT_L_X0Y34/FAN_BOUNCE1, pip INT_L_X0Y34/93.167 =====> visited wire INT_L_X0Y34/FAN_BOUNCE7, pip INT_L_X0Y34/99.167 =====> visited wire INT_L_X0Y34/GFAN0, pip INT_L_X0Y34/136.167 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L19, pip INT_L_X0Y34/217.167 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L5, pip INT_L_X0Y34/225.167 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L9, pip INT_L_X0Y34/229.167 =====> visited wire INT_L_X0Y34/NW2A1, pip INT_L_X0Y34/273.167 =====> visited wire INT_L_X0Y33/NL1BEG1, pip INT_L_X0Y34/310.167 =====> visited wire INT_L_X0Y33/NN2A1, pip INT_L_X0Y34/322.167 =====> visited wire INT_L_X0Y33/NR1BEG1, pip INT_L_X0Y34/360.167 =====> visited wire INT_L_X0Y34/NW2END1, pip INT_L_X0Y34/372.167 =====> visited wire INT_L_X0Y34/SW2A1, pip INT_L_X0Y34/414.167 =====> visited wire INT_L_X0Y35/SL1BEG1, pip INT_L_X0Y34/450.167 =====> visited wire INT_L_X0Y34/SR1BEG_S0, pip INT_L_X0Y34/456.167 =====> visited wire INT_L_X0Y35/SS2A1, pip INT_L_X0Y34/470.167 =====> visited wire INT_L_X0Y34/SW2END1, pip INT_L_X0Y34/512.167 =====> visited wire INT_L_X0Y34/VCC_WIRE, pip INT_L_X0Y34/545.167 =====> visited wire INT_L_X0Y34/WL1END1, pip INT_L_X0Y34/552.167 =====> visited wire INT_L_X0Y34/WR1END1, pip INT_L_X0Y34/562.167 =====> visited wire INT_L_X0Y34/WW2END0, pip INT_L_X0Y34/574.167 =====> visited wire INT_L_X0Y34/BYP_ALT0, pip INT_L_X0Y34/0.8 =====> visited wire INT_L_X0Y33/BYP_ALT6, pip INT_L_X0Y33/6.14 =====> visited wire INT_R_X1Y34/LOGIC_OUTS1, pip INT_R_X1Y34/207.571 =====> visited wire INT_R_X1Y34/LOGIC_OUTS13, pip INT_R_X1Y34/211.571 =====> visited wire INT_R_X1Y34/LOGIC_OUTS19, pip INT_R_X1Y34/217.571 =====> visited wire INT_R_X1Y34/LOGIC_OUTS23, pip INT_R_X1Y34/222.571 =====> visited wire INT_R_X1Y34/LOGIC_OUTS5, pip INT_R_X1Y34/225.571 =====> visited wire INT_R_X1Y34/LOGIC_OUTS9, pip INT_R_X1Y34/229.571 =====> visited wire INT_R_X1Y33/NN2A2, pip INT_R_X1Y34/323.571 =====> visited wire INT_R_X1Y29/NN6A2, pip INT_R_X1Y34/352.571 =====> visited wire INT_L_X2Y34/NW2A2, pip INT_R_X1Y34/373.571 =====> visited wire INT_L_X2Y30/NW6A2, pip INT_R_X1Y34/402.571 =====> visited wire INT_R_X1Y35/SL1BEG1, pip INT_R_X1Y34/450.571 =====> visited wire INT_R_X1Y35/SR1BEG1, pip INT_R_X1Y34/457.571 =====> visited wire INT_R_X1Y35/SS2A1, pip INT_R_X1Y34/470.571 =====> visited wire INT_R_X1Y39/SS6A1, pip INT_R_X1Y34/499.571 =====> visited wire INT_L_X2Y34/SW2A1, pip INT_R_X1Y34/512.571 =====> visited wire INT_L_X2Y38/SW6A1, pip INT_R_X1Y34/541.571 =====> visited wire INT_L_X2Y34/WL1BEG1, pip INT_R_X1Y34/552.571 =====> visited wire INT_L_X2Y34/WR1BEG2, pip INT_R_X1Y34/563.571 =====> visited wire INT_L_X2Y34/WW2A1, pip INT_R_X1Y34/575.571 =====> visited wire INT_L_X2Y34/WW4C2, pip INT_R_X1Y34/597.571 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L10, pip INT_L_X0Y34/208.547 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L14, pip INT_L_X0Y34/212.547 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L16, pip INT_L_X0Y34/214.547 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L2, pip INT_L_X0Y34/218.547 =====> visited wire INT_L_X0Y34/LOGIC_OUTS_L20, pip INT_L_X0Y34/219.547 ...
Here is some optimization potential (I added some print statements to see what gets visited when routing backwards):