Closed hansfbaier closed 1 year ago
LiteX K7DDRPHY seems to work nicely with the results of the fuzzer you gave me. Building this design: https://github.com/kintex-chatter/demo-projects/tree/main/litex-ddr-stlv7325 I got two out of eight DDR3 modules working (four or more would have software crashes/erratic execution, probably timing issues because of increased congestion): Left is vivado, right is nextpnr-xilinx: This PR is based on the IDDR PR (https://github.com/gatecat/nextpnr-xilinx/pull/61). This PR also needs the corresponding changes in nextpnr-xilinx-meta: https://github.com/gatecat/nextpnr-xilinx-meta/pull/3 I
@gatecat I just rebased this branch on xilinx-upstream. Thanks for merging.
LiteX K7DDRPHY seems to work nicely with the results of the fuzzer you gave me. Building this design: https://github.com/kintex-chatter/demo-projects/tree/main/litex-ddr-stlv7325 I got two out of eight DDR3 modules working (four or more would have software crashes/erratic execution, probably timing issues because of increased congestion): Left is vivado, right is nextpnr-xilinx:
This PR is based on the IDDR PR (https://github.com/gatecat/nextpnr-xilinx/pull/61).
This PR also needs the corresponding changes in nextpnr-xilinx-meta:
https://github.com/gatecat/nextpnr-xilinx-meta/pull/3
I