Status of the registers if HBlank DMA is started during HBlank

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Status of the registers if HBlank DMA is started during HBlank #364

Open avivace opened 3 years ago

avivace commented 3 years ago

HBlank DMA should not be started (write to FF55) during a HBlank period (STAT mode 0).

If the transfer's destination address overflows, the transfer stops prematurely. The status of the registers if this happens still needs to be investigated.

ISSOtm commented 3 years ago

Er, context, please?

avivace commented 3 years ago

Er, context, please?

First warning box here: https://gbdev.io/pandocs/CGB_Registers.html#lcd-vram-dma-transfers

Also, see https://github.com/gbdev/pandocs/pull/365. I've added a link to mention this issue so it doesn't remain a "todo" in the text as it's now