gdabah / distorm

Powerful Disassembler Library For x86/AMD64
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Incorrect RDRAND disassembly - missing register #81

Closed GoogleCodeExporter closed 9 years ago

GoogleCodeExporter commented 9 years ago
In what mode did you try to disassemble (16/32/64)?
All

What is the input buffer (binary stream) you used to reproduce the problem?
0fc7f7

What is the expected output (or what instruction)?
RDRAND RDI
(I think)

Which tool did you use to see the expected output?
disasm.exe

What do you see instead?
RDRAND

What version of diStorm are you using? On what platform (Python/EXE/other)?
Win32 EXE on revision 245

Please provide any additional information below.
Looks like RDRAND is mixed up with the VMPTRLD opcode encoding, and I don't see 
a quick fix in order to add REG_FULL as the operand for 0F C7 /6 when MOD=11.

Set("0f, c7 /06", ["RDRAND", "VMPTRLD"], [OPT.MEM_OPT], IFlag.MODRM_REQUIRED | 
IFlag._32BITS | IFlag.USE_EXMNEMONIC | IFlag.MNEMONIC_MODRM_BASED)

Original issue reported on code.google.com by matthew....@gmail.com on 11 Aug 2014 at 5:55

GoogleCodeExporter commented 9 years ago
This is a bug indeed, thanks for reporting.

Original comment by distorm@gmail.com on 13 Dec 2014 at 10:37

GoogleCodeExporter commented 9 years ago
Finally fixed. And yes the DB isn't flexible for this kind of mix of 
instructions :(

Original comment by distorm@gmail.com on 13 Dec 2014 at 7:49