Compilation error - Githubissues

Rebuild started: Project: HUGS *** Using Compiler 'V5.06 update 6 (build 750)', folder: 'd:\Keil_v5\ARM\ARMCC\Bin' Rebuild target 'Target 1' compiling it.c... Src\it.c(118): error: #20: identifier "DMA_INT_FLAG_FTF" is undefined if (dma_interrupt_flag_get(DMA_CH0, DMA_INT_FLAG_FTF)) Src\it.c(132): error: #20: identifier "DMA_INT_FLAG_FTF" is undefined if (dma_interrupt_flag_get(DMA_CH2, DMA_INT_FLAG_FTF)) Src\it.c(148): error: #20: identifier "DMA_INT_FLAG_FTF" is undefined if (dma_interrupt_flag_get(DMA_CH4, DMA_INT_FLAG_FTF)) Src\it.c: 0 warnings, 3 errors compiling comms.c... Src\comms.c(38): error: #20: identifier "USART_FLAG_TC" is undefined while (usart_flag_get(usart_periph, USART_FLAG_TC) == RESET) {} Src\comms.c: 0 warnings, 1 error compiling setup.c... Src\setup.c(69): warning: #223-D: function "rcu_all_reset_flag_clear" declared implicitly rcu_all_reset_flag_clear(); Src\setup.c(101): error: #136: struct "" has no field "counterdirection" timeoutTimer_paramter_struct.counterdirection = TIMER_COUNTER_UP; Src\setup.c(102): error: #136: struct "" has no field "prescaler" timeoutTimer_paramter_struct.prescaler = 0; Src\setup.c(103): error: #136: struct "" has no field "alignedmode" timeoutTimer_paramter_struct.alignedmode = TIMER_COUNTER_CENTER_DOWN; Src\setup.c(104): error: #136: struct "" has no field "period" timeoutTimer_paramter_struct.period = 72000000 / 2 / TIMEOUT_FREQ; Src\setup.c(105): error: #136: struct "" has no field "clockdivision" timeoutTimer_paramter_struct.clockdivision = TIMER_CKDIV_DIV1; Src\setup.c(106): error: #136: struct "" has no field "repetitioncounter" timeoutTimer_paramter_struct.repetitioncounter = 0; Src\setup.c(237): error: #136: struct "" has no field "counterdirection" timerBldc_paramter_struct.counterdirection = TIMER_COUNTER_UP; Src\setup.c(238): error: #136: struct "" has no field "prescaler" timerBldc_paramter_struct.prescaler = 0; Src\setup.c(239): error: #136: struct "" has no field "alignedmode" timerBldc_paramter_struct.alignedmode = TIMER_COUNTER_CENTER_DOWN; Src\setup.c(240): error: #136: struct "" has no field "period" timerBldc_paramter_struct.period = 72000000 / 2 / PWM_FREQ; Src\setup.c(241): error: #136: struct "" has no field "clockdivision" timerBldc_paramter_struct.clockdivision = TIMER_CKDIV_DIV1; Src\setup.c(242): error: #136: struct "" has no field "repetitioncounter" timerBldc_paramter_struct.repetitioncounter = 0; Src\setup.c(269): error: #136: struct "" has no field "ocpolarity" timerBldc_oc_parameter_struct.ocpolarity = TIMER_OC_POLARITY_HIGH; Src\setup.c(270): error: #136: struct "" has no field "ocnpolarity" timerBldc_oc_parameter_struct.ocnpolarity = TIMER_OCN_POLARITY_LOW; Src\setup.c(271): error: #136: struct "" has no field "ocidlestate" timerBldc_oc_parameter_struct.ocidlestate = TIMER_OC_IDLE_STATE_LOW; Src\setup.c(272): error: #136: struct "" has no field "ocnidlestate" timerBldc_oc_parameter_struct.ocnidlestate = TIMER_OCN_IDLE_STATE_HIGH; Src\setup.c(280): error: #136: struct "" has no field "runoffstate" timerBldc_break_parameter_struct.runoffstate = TIMER_ROS_STATE_ENABLE; Src\setup.c(281): error: #136: struct "" has no field "ideloffstate" timerBldc_break_parameter_struct.ideloffstate = TIMER_IOS_STATE_DISABLE; Src\setup.c(282): error: #136: struct "" has no field "protectmode" timerBldc_break_parameter_struct.protectmode = TIMER_CCHP_PROT_OFF; Src\setup.c(283): error: #136: struct "" has no field "deadtime" timerBldc_break_parameter_struct.deadtime = DEAD_TIME; Src\setup.c(284): error: #136: struct "" has no field "breakstate" timerBldc_break_parameter_struct.breakstate = TIMER_BREAK_ENABLE; Src\setup.c(285): error: #136: struct "" has no field "breakpolarity" timerBldc_break_parameter_struct.breakpolarity = TIMER_BREAK_POLARITY_LOW; Src\setup.c(286): error: #136: struct "" has no field "outputautostate" timerBldc_break_parameter_struct.outputautostate = TIMER_OUTAUTO_ENABLE; Src\setup.c(295): warning: #223-D: function "timer_channel_output_state_config" declared implicitly timer_channel_output_state_config(TIMER_BLDC, TIMER_BLDC_CHANNEL_G, TIMER_CCX_ENABLE); Src\setup.c(300): warning: #223-D: function "timer_channel_complementary_output_state_config" declared implicitly timer_channel_complementary_output_state_config(TIMER_BLDC, TIMER_BLDC_CHANNEL_G, TIMER_CCXN_ENABLE); Src\setup.c(329): error: #20: identifier "DMA_PERIPHERAL_TO_MEMORY" is undefined dma_init_struct_adc.direction = DMA_PERIPHERAL_TO_MEMORY; Src\setup.c(363): warning: #223-D: function "adc_tempsensor_vrefint_disable" declared implicitly adc_tempsensor_vrefint_disable(); Src\setup.c(364): warning: #223-D: function "adc_vbat_disable" declared implicitly adc_vbat_disable(); Src\setup.c(367): warning: #223-D: function "adc_watchdog_disable" declared implicitly adc_watchdog_disable(); Src\setup.c(376): warning: #223-D: function "adc_dma_mode_enable" declared implicitly adc_dma_mode_enable(); Src\setup.c(399): warning: #223-D: function "usart_transmit_config" declared implicitly usart_transmit_config(USART_HUGS, USART_TRANSMIT_ENABLE); Src\setup.c(399): error: #20: identifier "USART_TRANSMIT_ENABLE" is undefined usart_transmit_config(USART_HUGS, USART_TRANSMIT_ENABLE); Src\setup.c(400): warning: #223-D: function "usart_receive_config" declared implicitly usart_receive_config(USART_HUGS, USART_RECEIVE_ENABLE); Src\setup.c(400): error: #20: identifier "USART_RECEIVE_ENABLE" is undefined usart_receive_config(USART_HUGS, USART_RECEIVE_ENABLE); Src\setup.c(410): error: #20: identifier "DMA_PERIPHERAL_TO_MEMORY" is undefined dma_init_struct_usart.direction = DMA_PERIPHERAL_TO_MEMORY; Src\setup.c(426): warning: #223-D: function "usart_dma_receive_config" declared implicitly usart_dma_receive_config(USART_HUGS, USART_DENR_ENABLE); Src\setup.c(455): warning: #223-D: function "usart_transmit_config" declared implicitly usart_transmit_config(USART_STEER_COM, USART_TRANSMIT_ENABLE); Src\setup.c(455): error: #20: identifier "USART_TRANSMIT_ENABLE" is undefined usart_transmit_config(USART_STEER_COM, USART_TRANSMIT_ENABLE); Src\setup.c(456): warning: #223-D: function "usart_receive_config" declared implicitly usart_receive_config(USART_STEER_COM, USART_RECEIVE_ENABLE); Src\setup.c(456): error: #20: identifier "USART_RECEIVE_ENABLE" is undefined usart_receive_config(USART_STEER_COM, USART_RECEIVE_ENABLE); Src\setup.c(466): error: #20: identifier "DMA_PERIPHERAL_TO_MEMORY" is undefined dma_init_struct_usart.direction = DMA_PERIPHERAL_TO_MEMORY; Src\setup.c: 12 warnings, 30 errors compiling led.c... compiling main.c... compiling commsSteering.c... compiling commsHUGS.c... compiling bldc.c... compiling gd32f1x0_dbg.c... RTE\Device\GD32F130C8\gd32f1x0_dbg.c(85): error: #20: identifier "dbg_periph_enum" is undefined void dbg_periph_enable(dbg_periph_enum dbg_periph) RTE\Device\GD32F130C8\gd32f1x0_dbg.c(87): warning: #223-D: function "DBG_REG_VAL" declared implicitly DBG_REG_VAL(dbg_periph) |= BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c(87): warning: #223-D: function "DBG_BIT_POS" declared implicitly DBG_REG_VAL(dbg_periph) |= BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c(87): error: #137: expression must be a modifiable lvalue DBG_REG_VAL(dbg_periph) |= BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c(103): error: #20: identifier "dbg_periph_enum" is undefined void dbg_periph_disable(dbg_periph_enum dbg_periph) RTE\Device\GD32F130C8\gd32f1x0_dbg.c(105): warning: #223-D: function "DBG_REG_VAL" declared implicitly DBG_REG_VAL(dbg_periph) &= ~BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c(105): warning: #223-D: function "DBG_BIT_POS" declared implicitly DBG_REG_VAL(dbg_periph) &= ~BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c(105): error: #137: expression must be a modifiable lvalue DBG_REG_VAL(dbg_periph) &= ~BIT(DBG_BIT_POS(dbg_periph)); RTE\Device\GD32F130C8\gd32f1x0_dbg.c: 4 warnings, 4 errors compiling gd32f1x0_adc.c... RTE\Device\GD32F130C8\gd32f1x0_adc.c(183): error: #147-D: declaration is incompatible with "void adc_special_function_config(uint8_t, ControlStatus)" (declared at line 297 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_special_function_config(uint32_t function, ControlStatus newvalue) RTE\Device\GD32F130C8\gd32f1x0_adc.c(217): error: #147-D: declaration is incompatible with "void adc_data_alignment_config(uint8_t)" (declared at line 315 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_data_alignment_config(uint32_t data_alignment) RTE\Device\GD32F130C8\gd32f1x0_adc.c(238): error: #147-D: declaration is incompatible with "void adc_channel_length_config(uint8_t, uint8_t)" (declared at line 291 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_channel_length_config(uint8_t channel_group,uint32_t length) RTE\Device\GD32F130C8\gd32f1x0_adc.c(284): error: #20: identifier "ADC_RSQX_RSQN" is undefined rsq &= ~((uint32_t)(ADC_RSQX_RSQN << (5Urank))); RTE\Device\GD32F130C8\gd32f1x0_adc.c(289): error: #20: identifier "ADC_RSQX_RSQN" is undefined rsq &= ~((uint32_t)(ADC_RSQX_RSQN << (5U(rank-6U)))); RTE\Device\GD32F130C8\gd32f1x0_adc.c(294): error: #20: identifier "ADC_RSQX_RSQN" is undefined rsq &= ~((uint32_t)(ADC_RSQX_RSQN << (5U(rank-12U)))); RTE\Device\GD32F130C8\gd32f1x0_adc.c(334): error: #147-D: declaration is incompatible with "void adc_inserted_channel_config(uint8_t, uint8_t, uint8_t)" (declared at line 295 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_inserted_channel_config(uint8_t rank, uint8_t channel, uint32_t sample_time) RTE\Device\GD32F130C8\gd32f1x0_adc.c(342): error: #20: identifier "ADC_ISQ_ISQN" is undefined isq &= ~((uint32_t)(ADC_ISQ_ISQN << (15U - (inserted_length - rank)5U))); RTE\Device\GD32F130C8\gd32f1x0_adc.c(385): warning: #223-D: function "IOFFX_IOFF" declared implicitly REG32((ADC_BASE) + 0x14U + num) = IOFFX_IOFF((uint32_t)offset); RTE\Device\GD32F130C8\gd32f1x0_adc.c(534): error: #147-D: declaration is incompatible with "FlagStatus adc_flag_get(uint8_t)" (declared at line 267 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") FlagStatus adc_flag_get(uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_adc.c(556): error: #147-D: declaration is incompatible with "void adc_flag_clear(uint8_t)" (declared at line 269 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_flag_clear(uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_adc.c(570): error: #147-D: declaration is incompatible with "FlagStatus adc_interrupt_flag_get(uint8_t)" (declared at line 271 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") FlagStatus adc_interrupt_flag_get(uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_adc.c(576): error: #20: identifier "ADC_INT_FLAG_WDE" is undefined case ADC_INT_FLAG_WDE: RTE\Device\GD32F130C8\gd32f1x0_adc.c(582): error: #20: identifier "ADC_INT_FLAG_EOC" is undefined case ADC_INT_FLAG_EOC: RTE\Device\GD32F130C8\gd32f1x0_adc.c(588): error: #20: identifier "ADC_INT_FLAG_EOIC" is undefined case ADC_INT_FLAG_EOIC: RTE\Device\GD32F130C8\gd32f1x0_adc.c(610): error: #147-D: declaration is incompatible with "void adc_interrupt_flag_clear(uint8_t)" (declared at line 273 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_interrupt_flag_clear(uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_adc.c(627): error: #147-D: declaration is incompatible with "void adc_interrupt_enable(uint8_t)" (declared at line 277 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_interrupt_enable(uint32_t interrupt) RTE\Device\GD32F130C8\gd32f1x0_adc.c(654): error: #147-D: declaration is incompatible with "void adc_interrupt_disable(uint8_t)" (declared at line 279 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_adc.h") void adc_interrupt_disable(uint32_t interrupt) RTE\Device\GD32F130C8\gd32f1x0_adc.c: 1 warning, 17 errors compiling gd32f1x0_opa.c... compiling gd32f1x0_dma.c... RTE\Device\GD32F130C8\gd32f1x0_dma.c(86): error: #20: identifier "DMA_PERIPHERAL_TO_MEMORY" is undefined if(DMA_PERIPHERAL_TO_MEMORY == init_struct.direction){ RTE\Device\GD32F130C8\gd32f1x0_dma.c(87): error: #20: identifier "DMA_CHXCTL_DIR" is undefined DMA_CHCTL(channelx) &= ~DMA_CHXCTL_DIR; RTE\Device\GD32F130C8\gd32f1x0_dma.c(89): error: #20: identifier "DMA_CHXCTL_DIR" is undefined DMA_CHCTL(channelx) |= DMA_CHXCTL_DIR; RTE\Device\GD32F130C8\gd32f1x0_dma.c(343): error: #20: identifier "DMA_PERIPHERAL_TO_MEMORY" is undefined if(DMA_PERIPHERAL_TO_MEMORY == direction){ RTE\Device\GD32F130C8\gd32f1x0_dma.c(344): error: #20: identifier "DMA_CHXCTL_DIR" is undefined DMA_CHCTL(channelx) &= ~DMA_CHXCTL_DIR; RTE\Device\GD32F130C8\gd32f1x0_dma.c(346): error: #20: identifier "DMA_CHXCTL_DIR" is undefined DMA_CHCTL(channelx) |= DMA_CHXCTL_DIR; RTE\Device\GD32F130C8\gd32f1x0_dma.c(369): error: #20: identifier "DMA_INT_FLAG_FTF" is undefined case DMA_INT_FLAG_FTF: RTE\Device\GD32F130C8\gd32f1x0_dma.c(374): error: #20: identifier "DMA_INT_FLAG_HTF" is undefined case DMA_INT_FLAG_HTF: RTE\Device\GD32F130C8\gd32f1x0_dma.c(379): error: #20: identifier "DMA_INT_FLAG_ERR" is undefined case DMA_INT_FLAG_ERR: RTE\Device\GD32F130C8\gd32f1x0_dma.c(382): error: #20: identifier "DMA_CHXCTL_ERRIE" is undefined interrupt_enable = DMA_CHCTL( channelx) & DMA_CHXCTL_ERRIE; RTE\Device\GD32F130C8\gd32f1x0_dma.c(384): error: #20: identifier "DMA_INT_FLAG_G" is undefined case DMA_INT_FLAG_G: RTE\Device\GD32F130C8\gd32f1x0_dma.c: 0 warnings, 11 errors compiling gd32f1x0_i2c.c... RTE\Device\GD32F130C8\gd32f1x0_i2c.c(169): error: #147-D: declaration is incompatible with "void i2c_ack_config(uint32_t, i2c_ack_enum)" (declared at line 255 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_ack_config(uint32_t i2c_periph, uint32_t ack) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(187): error: #147-D: declaration is incompatible with "void i2c_ackpos_config(uint32_t, i2c_ackpos_enum)" (declared at line 257 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_ackpos_config(uint32_t i2c_periph, uint32_t pos) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(207): error: #147-D: declaration is incompatible with "void i2c_master_addressing(uint32_t, uint8_t, uint32_t)" (declared at line 259 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_master_addressing(uint32_t i2c_periph, uint32_t addr, uint32_t trandirection) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(226): error: #147-D: declaration is incompatible with "void i2c_dualaddr_enable(uint32_t, i2c_dualaddr_enum)" (declared at line 261 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_dualaddr_enable(uint32_t i2c_periph, uint32_t dualaddr) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(288): warning: #223-D: function "DATA_TRANS" declared implicitly I2C_DATA(i2c_periph) = DATA_TRANS(data); RTE\Device\GD32F130C8\gd32f1x0_i2c.c(299): warning: #223-D: function "DATA_RECV" declared implicitly return (uint8_t)DATA_RECV(I2C_DATA(i2c_periph)); RTE\Device\GD32F130C8\gd32f1x0_i2c.c(349): error: #147-D: declaration is incompatible with "void i2c_stretch_scl_low_config(uint32_t, i2c_stretchscl_enum)" (declared at line 278 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_stretch_scl_low_config(uint32_t i2c_periph, uint32_t stretchpara) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(368): error: #147-D: declaration is incompatible with "void i2c_slave_response_to_gcall_config(uint32_t, i2c_gcall_config_enum)" (declared at line 280 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_slave_response_to_gcall_config(uint32_t i2c_periph, uint32_t gcallpara) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(387): error: #147-D: declaration is incompatible with "void i2c_software_reset_config(uint32_t, i2c_software_reset_enum)" (declared at line 282 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_i2c.h") void i2c_software_reset_config(uint32_t i2c_periph, uint32_t sreset) RTE\Device\GD32F130C8\gd32f1x0_i2c.c(465): error: #20: identifier "I2C_FLAG_ADDSEND" is undefined if(I2C_FLAG_ADDSEND == flag){ RTE\Device\GD32F130C8\gd32f1x0_i2c.c(583): error: #20: identifier "I2C_INT_FLAG_ADDSEND" is undefined if(I2C_INT_FLAG_ADDSEND == intflag){ RTE\Device\GD32F130C8\gd32f1x0_i2c.c: 2 warnings, 9 errors compiling gd32f1x0_gpio.c... RTE\Device\GD32F130C8\gd32f1x0_gpio.c(72): error: #147-D: declaration is incompatible with "void gpio_mode_set(uint32_t, uint8_t, uint8_t, uint16_t)" (declared at line 342 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_mode_set(uint32_t gpio_periph,uint32_t mode,uint32_t pull_up_down,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(112): error: #147-D: declaration is incompatible with "void gpio_output_options_set(uint32_t, uint8_t, uint8_t, uint16_t)" (declared at line 344 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_output_options_set(uint32_t gpio_periph,uint8_t otype,uint32_t speed,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(144): error: #147-D: declaration is incompatible with "void gpio_bit_set(uint32_t, uint16_t)" (declared at line 347 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_bit_set(uint32_t gpio_periph,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(156): error: #147-D: declaration is incompatible with "void gpio_bit_reset(uint32_t, uint16_t)" (declared at line 349 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_bit_reset(uint32_t gpio_periph,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(171): error: #147-D: declaration is incompatible with "void gpio_bit_write(uint32_t, uint16_t, bit_status)" (declared at line 351 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_bit_write(uint32_t gpio_periph,uint32_t pin,bit_status bit_value) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(199): error: #147-D: declaration is incompatible with "FlagStatus gpio_input_bit_get(uint32_t, uint16_t)" (declared at line 356 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") FlagStatus gpio_input_bit_get(uint32_t gpio_periph,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(226): error: #147-D: declaration is incompatible with "FlagStatus gpio_output_bit_get(uint32_t, uint16_t)" (declared at line 360 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") FlagStatus gpio_output_bit_get(uint32_t gpio_periph,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(265): error: #147-D: declaration is incompatible with "void gpio_af_set(uint32_t, uint8_t, uint16_t)" (declared at line 365 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_af_set(uint32_t gpio_periph,uint32_t alt_func_num,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c(300): error: #147-D: declaration is incompatible with "void gpio_pin_lock(uint32_t, uint16_t)" (declared at line 367 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_gpio.h") void gpio_pin_lock(uint32_t gpio_periph,uint32_t pin) RTE\Device\GD32F130C8\gd32f1x0_gpio.c: 0 warnings, 9 errors compiling gd32f1x0_fwdgt.c... compiling gd32f1x0_misc.c... compiling gd32f1x0_syscfg.c... RTE\Device\GD32F130C8\gd32f1x0_syscfg.c(25): error: #20: identifier "RCU_CFGCMPRST" is undefined rcu_periph_reset_enable(RCU_CFGCMPRST); RTE\Device\GD32F130C8\gd32f1x0_syscfg.c: 0 warnings, 1 error compiling gd32f1x0_rcu.c... RTE\Device\GD32F130C8\gd32f1x0_rcu.c(90): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(90): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(90): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(120): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(120): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(120): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(132): error: #20: identifier "rcu_periph_sleep_enum" is undefined void rcu_periph_clock_sleep_enable(rcu_periph_sleep_enum periph) RTE\Device\GD32F130C8\gd32f1x0_rcu.c(134): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(134): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(134): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph) |= BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(146): error: #20: identifier "rcu_periph_sleep_enum" is undefined void rcu_periph_clock_sleep_disable(rcu_periph_sleep_enum periph) RTE\Device\GD32F130C8\gd32f1x0_rcu.c(148): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(148): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(148): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph) &= ~BIT(RCU_BIT_POS(periph)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(175): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(175): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(175): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(202): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(202): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(202): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(619): warning: #223-D: function "RCU_REG_VAL" declared implicitly if(RESET != (RCU_REG_VAL(flag) & BIT(RCU_BIT_POS(flag)))){ RTE\Device\GD32F130C8\gd32f1x0_rcu.c(619): warning: #223-D: function "RCU_BIT_POS" declared implicitly if(RESET != (RCU_REG_VAL(flag) & BIT(RCU_BIT_POS(flag)))){ RTE\Device\GD32F130C8\gd32f1x0_rcu.c(692): error: #20: identifier "rcu_int_enum" is undefined void rcu_interrupt_enable(rcu_int_enum stab_int) RTE\Device\GD32F130C8\gd32f1x0_rcu.c(711): error: #20: identifier "rcu_int_enum" is undefined void rcu_interrupt_disable(rcu_int_enum stab_int) RTE\Device\GD32F130C8\gd32f1x0_rcu.c(729): error: #147: declaration is incompatible with "void rcu_osci_stab_wait(rcu_osci_type_enum)" (declared at line 930 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_rcu.h") ErrStatus rcu_osci_stab_wait(rcu_osci_type_enum osci) RTE\Device\GD32F130C8\gd32f1x0_rcu.c(812): error: #20: identifier "RCU_PLL_CK" is undefined case RCU_PLL_CK: RTE\Device\GD32F130C8\gd32f1x0_rcu.c(846): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(osci) |= BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(846): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(osci) |= BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(846): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(osci) |= BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(864): warning: #223-D: function "RCU_REG_VAL" declared implicitly RCU_REG_VAL(osci) &= ~BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(864): warning: #223-D: function "RCU_BIT_POS" declared implicitly RCU_REG_VAL(osci) &= ~BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(864): error: #137: expression must be a modifiable lvalue RCU_REG_VAL(osci) &= ~BIT(RCU_BIT_POS(osci)); RTE\Device\GD32F130C8\gd32f1x0_rcu.c(898): error: #20: identifier "RCU_PLL_CK" is undefined case RCU_PLL_CK: RTE\Device\GD32F130C8\gd32f1x0_rcu.c(936): error: #20: identifier "RCU_PLL_CK" is undefined case RCU_PLL_CK: RTE\Device\GD32F130C8\gd32f1x0_rcu.c: 18 warnings, 16 errors compiling gd32f1x0_pmu.c... compiling gd32f1x0_timer.c... RTE\Device\GD32F130C8\gd32f1x0_timer.c(87): error: #136: struct "" has no field "prescaler" TIMER_PSC(timer_periph) = (uint16_t)initpara->prescaler; RTE\Device\GD32F130C8\gd32f1x0_timer.c(92): error: #136: struct "" has no field "alignedmode" TIMER_CTL0(timer_periph) |= (uint32_t)initpara->alignedmode; RTE\Device\GD32F130C8\gd32f1x0_timer.c(93): error: #136: struct "" has no field "counterdirection" TIMER_CTL0(timer_periph) |= (uint32_t)initpara->counterdirection; RTE\Device\GD32F130C8\gd32f1x0_timer.c(96): error: #136: struct "" has no field "counterdirection" TIMER_CTL0(timer_periph) |= (uint32_t)initpara->counterdirection; RTE\Device\GD32F130C8\gd32f1x0_timer.c(100): error: #136: struct "" has no field "period" TIMER_CAR(timer_periph) = (uint32_t)initpara->period; RTE\Device\GD32F130C8\gd32f1x0_timer.c(105): error: #136: struct "" has no field "clockdivision" TIMER_CTL0(timer_periph) |= (uint32_t)initpara->clockdivision; RTE\Device\GD32F130C8\gd32f1x0_timer.c(110): error: #136: struct "" has no field "repetitioncounter" TIMER_CREP(timer_periph) = (uint32_t)initpara->repetitioncounter; RTE\Device\GD32F130C8\gd32f1x0_timer.c(194): error: #147-D: declaration is incompatible with "void timer_counter_alignment(uint32_t, uint32_t)" (declared at line 645 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_counter_alignment(uint32_t timer_periph, uint16_t aligned) RTE\Device\GD32F130C8\gd32f1x0_timer.c(234): error: #147-D: declaration is incompatible with "void timer_prescaler_config(uint32_t, uint16_t, uint16_t)" (declared at line 654 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_prescaler_config(uint32_t timer_periph, uint16_t prescaler, uint8_t pscreload) RTE\Device\GD32F130C8\gd32f1x0_timer.c(314): error: #147-D: declaration is incompatible with "void timer_single_pulse_mode_config(uint32_t, uint32_t)" (declared at line 669 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_single_pulse_mode_config(uint32_t timer_periph, uint8_t spmode) RTE\Device\GD32F130C8\gd32f1x0_timer.c(333): error: #147-D: declaration is incompatible with "void timer_update_source_config(uint32_t, uint32_t)" (declared at line 671 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_update_source_config(uint32_t timer_periph, uint8_t update) RTE\Device\GD32F130C8\gd32f1x0_timer.c(398): error: #147-D: declaration is incompatible with "FlagStatus timer_interrupt_flag_get(uint32_t, uint16_t)" (declared at line 633 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") FlagStatus timer_interrupt_flag_get(uint32_t timer_periph, uint32_t interrupt) RTE\Device\GD32F130C8\gd32f1x0_timer.c(427): error: #147-D: declaration is incompatible with "void timer_interrupt_flag_clear(uint32_t, uint16_t)" (declared at line 635 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_interrupt_flag_clear(uint32_t timer_periph, uint32_t interrupt) RTE\Device\GD32F130C8\gd32f1x0_timer.c(451): error: #147-D: declaration is incompatible with "FlagStatus timer_flag_get(uint32_t, uint16_t)" (declared at line 637 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") FlagStatus timer_flag_get(uint32_t timer_periph, uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_timer.c(479): error: #147-D: declaration is incompatible with "void timer_flag_clear(uint32_t, uint16_t)" (declared at line 639 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_flag_clear(uint32_t timer_periph, uint32_t flag) RTE\Device\GD32F130C8\gd32f1x0_timer.c(612): error: #136: struct "" has no field "runoffstate" TIMER_CCHP(timer_periph) = (uint32_t)(((uint32_t)breakpara->runoffstate) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(613): error: #136: struct "" has no field "ideloffstate" ((uint32_t)breakpara->ideloffstate) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(614): error: #136: struct "" has no field "deadtime" ((uint32_t)breakpara->deadtime) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(615): error: #136: struct "" has no field "breakpolarity" ((uint32_t)breakpara->breakpolarity) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(616): error: #136: struct "" has no field "outputautostate" ((uint32_t)breakpara->outputautostate) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(617): error: #136: struct "" has no field "protectmode" ((uint32_t)breakpara->protectmode) | RTE\Device\GD32F130C8\gd32f1x0_timer.c(618): error: #136: struct "" has no field "breakstate" ((uint32_t)breakpara->breakstate)); RTE\Device\GD32F130C8\gd32f1x0_timer.c(706): error: #147-D: declaration is incompatible with "void timer_channel_control_shadow_update_config(uint32_t, uint16_t)" (declared at line 711 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_timer.h") void timer_channel_control_shadow_update_config(uint32_t timer_periph, uint8_t ccuctl) RTE\Device\GD32F130C8\gd32f1x0_timer.c(742): error: #136: struct "" has no field "outputstate" TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; RTE\Device\GD32F130C8\gd32f1x0_timer.c(746): error: #136: struct "" has no field "ocpolarity" TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; RTE\Device\GD32F130C8\gd32f1x0_timer.c(752): error: #136: struct "" has no field "outputnstate" TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; RTE\Device\GD32F130C8\gd32f1x0_timer.c(756): error: #136: struct "" has no field "ocnpolarity" TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; RTE\Device\GD32F130C8\gd32f1x0_timer.c(760): error: #136: struct "" has no field "ocidlestate" TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; RTE\Device\GD32F130C8\gd32f1x0_timer.c(764): error: #136: struct "" has no field "ocnidlestate" TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocnidlestate; RTE\Device\GD32F130C8\gd32f1x0_timer.c(772): error: #136: struct "" has no field "outputstate" TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)ocpara->outputstate << 4); RTE\Device\GD32F130C8\gd32f1x0_timer.c: 0 warnings, 30 errors assembling startup_gd32f1x0.s... compiling gd32f1x0_usart.c... RTE\Device\GD32F130C8\gd32f1x0_usart.c(757): error: #55-D: too many arguments in invocation of macro "BIT" USART_GP(usart_periph) &= ~(USART_GP_PSC); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1003): error: #20: identifier "usart_flag_enum" is undefined FlagStatus usart_flag_get(uint32_t usart_periph, usart_flag_enum flag) RTE\Device\GD32F130C8\gd32f1x0_usart.c(1005): warning: #223-D: function "USART_REG_VAL" declared implicitly if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ RTE\Device\GD32F130C8\gd32f1x0_usart.c(1005): warning: #223-D: function "USART_BIT_POS" declared implicitly if(RESET != (USART_REG_VAL(usart_periph, flag) & BIT(USART_BIT_POS(flag)))){ RTE\Device\GD32F130C8\gd32f1x0_usart.c(1031): error: #20: identifier "usart_flag_enum" is undefined void usart_flag_clear(uint32_t usart_periph, usart_flag_enum flag) RTE\Device\GD32F130C8\gd32f1x0_usart.c(1033): warning: #223-D: function "USART_BIT_POS" declared implicitly USART_INTC(usart_periph) |= BIT(USART_BIT_POS(flag)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1058): warning: #223-D: function "USART_REG_VAL" declared implicitly USART_REG_VAL(usart_periph, inttype) |= BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1058): warning: #223-D: function "USART_BIT_POS" declared implicitly USART_REG_VAL(usart_periph, inttype) |= BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1058): error: #137: expression must be a modifiable lvalue USART_REG_VAL(usart_periph, inttype) |= BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1083): warning: #223-D: function "USART_REG_VAL" declared implicitly USART_REG_VAL(usart_periph, inttype) &= ~BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1083): warning: #223-D: function "USART_BIT_POS" declared implicitly USART_REG_VAL(usart_periph, inttype) &= ~BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1083): error: #137: expression must be a modifiable lvalue USART_REG_VAL(usart_periph, inttype) &= ~BIT(USART_BIT_POS(inttype)); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1125): error: #147-D: declaration is incompatible with "FlagStatus usart_interrupt_flag_get(uint32_t, uint32_t, uint32_t)" (declared at line 452 of "D:\Keil_v5\ARM\PACK\GigaDevice\GD32F1x0_DFP\3.0.2\Device\Firmware\Peripherals\inc\gd32f1x0_usart.h") FlagStatus usart_interrupt_flag_get(uint32_t usart_periph, uint32_t int_flag) RTE\Device\GD32F130C8\gd32f1x0_usart.c(1129): warning: #223-D: function "USART_REG_VAL" declared implicitly intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1129): warning: #223-D: function "USART_BIT_POS" declared implicitly intenable = (USART_REG_VAL(usart_periph, int_flag) & BIT(USART_BIT_POS(int_flag))); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1131): warning: #223-D: function "USART_REG_VAL2" declared implicitly flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag))); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1131): warning: #223-D: function "USART_BIT_POS2" declared implicitly flagstatus = (USART_REG_VAL2(usart_periph, int_flag) & BIT(USART_BIT_POS2(int_flag))); RTE\Device\GD32F130C8\gd32f1x0_usart.c(1161): warning: #223-D: function "USART_BIT_POS2" declared implicitly USART_INTC(usart_periph) |= BIT(USART_BIT_POS2(flag)); RTE\Device\GD32F130C8\gd32f1x0_usart.c: 12 warnings, 6 errors compiling gd32f1x0_wwdgt.c... compiling system_gd32f1x0.c... ".\Objects\HUGS.axf" - 137 Error(s), 49 Warning(s). Target not created. Build Time Elapsed: 00:00:02

gearsincorg / Hoverboards-for-assistive-devices

Compilation error #4