Description
GHDL Bug occurred when running syntax check.
Expected behaviour
I expected either nothing to happen or a list of syntax errors.
How to reproduce?
I think the offending code is something like
with my_sel_s select
my_signal_s <= sig00_s when "00",
sig01_s when "01",
sig10_s when "10",
sig11_s when "11",
unaffected when others;
so it's probably an --std=08 issue with the "selected signal assignment."
Here's a minimal working example:
library ieee;
use ieee.std_logic_1164.all;
entity selsigass_tb is
end entity selsigass_tb;
architecture test of selsigass_tb is
signal my_signal_s, sig00_s, sig01_s, sig10_s, sig11_s : std_logic_vector(0 to 32-1) := (others => '0');
signal my_sel_s : std_logic_vector(0 to 2-1) := (others => '0');
begin
with my_sel_s select
my_signal_s <= sig00_s when "00",
sig01_s when "01",
sig10_s when "10",
sig11_s when "11",
unaffected when others;
end architecture test;
Context
OS: Arch Linux, Linux 6.6.13-1-lts
Origin:
$ ghdl --version
GHDL 4.0.0-dev (3.0.0.r329.g63eee3d6b) [Dunoon edition]
Compiled with GNAT Version: 13.1.1 20230429
GCC 11.2.0 code generator
Written by Tristan Gingold.
Managed by
$ pacman --version
.--. Pacman v6.0.2 - libalpm v13.0.2
/ _.-' .-. .-. .-. Copyright (C) 2006-2021 Pacman Development Team
\ '-. '-' '-' '-' Copyright (C) 2002-2006 Judd Vinet
'--'
This program may be freely redistributed under
the terms of the GNU General Public License.
If a GHDL Bug occurred block is shown in the log, please paste it here:
Description GHDL Bug occurred when running syntax check.
Expected behaviour I expected either nothing to happen or a list of syntax errors.
How to reproduce? I think the offending code is something like
so it's probably an
--std=08
issue with the "selected signal assignment."Here's a minimal working example:
Context
Origin:
Managed by
If a
GHDL Bug occurred
block is shown in the log, please paste it here:The bug for the minimal working example: