Crash when running UVVM Axistream VVC

[erick166]

Description GHDL crashes with the following error when using the UVVM Axistream VVC:

ghdl:error: NULL access dereferenced
ghdl:error: simulation failed
Error: Program ended with exit code 1

How to reproduce? To reproduce this error run the following testbench.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

library uvvm_util;
context uvvm_util.uvvm_util_context;

library uvvm_vvc_framework;
use uvvm_vvc_framework.ti_vvc_framework_support_pkg.all;

library bitvis_vip_axistream;
context bitvis_vip_axistream.vvc_context;

entity example_tb is
end entity;

architecture rtl of example_tb is

  constant C_CLK_PERIOD     : time    := 20 ns;
  constant C_DATA_WIDTH     : natural := 8;
  constant C_USER_WIDTH     : natural := 1;
  constant C_ID_WIDTH       : natural := 1;
  constant C_DEST_WIDTH     : natural := 1;
  constant C_AXIS_M_VVC_IDX : natural := 0;
  constant C_AXIS_S_VVC_IDX : natural := 1;

  signal clk          : std_logic := '0';
  signal axistream_if : t_axistream_if(tdata(C_DATA_WIDTH - 1 downto 0),
                                       tkeep((C_DATA_WIDTH / 8) - 1 downto 0),
                                       tuser(C_USER_WIDTH - 1 downto 0),
                                       tstrb((C_DATA_WIDTH / 8) - 1 downto 0),
                                       tid(C_ID_WIDTH - 1 downto 0),
                                       tdest(C_DEST_WIDTH - 1 downto 0));

begin

  i_ti_uvvm_engine : entity uvvm_vvc_framework.ti_uvvm_engine;

  i_axistream_vvc_m : entity bitvis_vip_axistream.axistream_vvc
    generic map (
      GC_VVC_IS_MASTER => true,
      GC_DATA_WIDTH    => C_DATA_WIDTH,
      GC_USER_WIDTH    => C_USER_WIDTH,
      GC_ID_WIDTH      => C_ID_WIDTH,
      GC_DEST_WIDTH    => C_DEST_WIDTH,
      GC_INSTANCE_IDX  => C_AXIS_M_VVC_IDX
    )
    port map(
      clk              => clk,
      axistream_vvc_if => axistream_if
    );

  i_axistream_vvc_s : entity bitvis_vip_axistream.axistream_vvc
    generic map (
      GC_VVC_IS_MASTER => false,
      GC_DATA_WIDTH    => C_DATA_WIDTH,
      GC_USER_WIDTH    => C_USER_WIDTH,
      GC_ID_WIDTH      => C_ID_WIDTH,
      GC_DEST_WIDTH    => C_DEST_WIDTH,
      GC_INSTANCE_IDX  => C_AXIS_S_VVC_IDX
    )
    port map(
      clk              => clk,
      axistream_vvc_if => axistream_if
    );

  p_clock : clock_generator(clk, C_CLK_PERIOD);

  p_main : process
    variable v_slv_array : t_slv_array(0 to 2)(7 downto 0) := (x"AA", x"BB", x"CC");
  begin
    await_uvvm_initialization(VOID);

    axistream_transmit(AXISTREAM_VVCT, C_AXIS_M_VVC_IDX, v_slv_array, "Transmit data");
    axistream_expect(AXISTREAM_VVCT, C_AXIS_S_VVC_IDX, v_slv_array, "Expect data");
    await_completion(AXISTREAM_VVCT, C_AXIS_S_VVC_IDX, 1 ms);

    wait;
  end process p_main;

end architecture rtl;

Context

• OS: Windows 11
• GHDL 5.0.0-dev (4.0.0.r24.g14b411c57)
• UVVM v2 2024.03.08

Additional context I think the problem started in the latest UVVM release when C_MAX_TUSER_BITS in axistream_bfm_pkg was changed from 8 to 64. I see that the error is gone when decreasing this constant or when decreasing for example C_VVC_CMD_DATA_MAX_BYTES in transaction_pkg. So perhaps it's too much data to handle?

[tgingold]

I can reproduce on Windows but not on Linux. I am investigating.

[tgingold]

You should simply increase the size of the stack by recompiling ghdl with additional flags: make ghdl_mcode.exe LDFLAGS=-Wl,--stack=0x400000

[erick166]

Alright, I guess this is sort of a temporary solution? Will you make a fix in a new release or do you suggest that UVVM be optimized in some way?

[tgingold]

Not so temporary. I keep that in mind. I need to rework how memory is allocated and avoid stack allocation for big blocks. I doubt that UVVM can work around this issue.

[helilidada]

![Uploading 截屏2024-04-27 14.26.03.png…]() can any one fix it? I tried to debug VTM(VVC 10.0) on MACOS, but it gonna this issue..I did not download YUV file yet.