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gillham / logic_analyzer

Implementation of a SUMP compatible logic analyzer for the Arduino
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Reducing channel count to increase samples #4

Closed rebelzach closed 11 years ago

rebelzach commented 12 years ago

Would it be possible to reduce the number of channels recorded (pins) in order to make the capture time longer? Thanks.

gillham commented 12 years ago

I don't believe it would be too practical as right now I'm doing one byte per sample (of all channels) and it happens in a couple of clock cycles. To go down to one or two channels would mean a lot of bit manipulations for each sample. E.g. read bits from the port, copy just the bits we want to the next sample location, (which might be bits 0/1, bits 2/3, etc for two channels), increment the bit offset, or byte offset etc, continue sampling.

I think this would reduce the practical sample rate low enough that it might not be super useful. Let me think about it some more.

What number of samples / sample rate would be of interest to you? E.g. is a single channel ok?

If you want to keep using dual purpose Arduino equipment, the Mega offers 7K of samples. If you're serious about logic analyzer work, I think you should consider the OpenBench Logic Sniffer as it has 24K for sampling and is much higher quality.

gillham commented 11 years ago

I'm going to close this one. I think the "simple" aspect of the 8 bit read is good enough, especially for something Arduino friendly (e.g. easier to read and understand). For better logic analyzer work, I still suggest the OLS hardware or using an Arduino Mega.