gojimmypi / VerilogLanguageExtension

Verilog Language Extension for Visual Studio
https://marketplace.visualstudio.com/items?itemName=gojimmypi.gojimmypi-verilog-language-extension
MIT License
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improper hover text warning for module scope #11

Open gojimmypi opened 4 years ago

gojimmypi commented 4 years ago

declarations inside of one module are note properly scoped for hover text definitions where there is more than one module defined in a given file with the same-named variable. For example, din and dout should not be colored in red, as they are not duplicates:

// BCD (Binary Coded Decimal) counter
module bcd8_increment (
    input [7:0] din,
    output reg [7:0] dout
);
    always @* begin
        case (1'b1)
            din[7:0] == 8'h 99:
                dout = 0;
            din[3:0] == 4'h 9:
                dout = {din[7:4] + 4'd 1, 4'h 0};
            default:
                dout = {din[7:4], din[3:0] + 4'd 1};
        endcase
    end
endmodule

// Seven segment controller
// Switches quickly between the two parts of the display
// to create the illusion of both halfs being illuminated
// at the same time.
module seven_seg_ctrl (
    input clk,
    input [7:0] din,
    output reg [7:0] dout
);
    wire [6:0] lsb_digit;
    wire [6:0] msb_digit;

    seven_seg_hex msb_nibble (
        .din(din[7:4]),
        .dout(msb_digit)
    );

    seven_seg_hex lsb_nibble (
        .din(din[3:0]),
        .dout(lsb_digit)
    );

    reg [9:0] clkdiv = 0;
    reg clkdiv_pulse = 0;
    reg msb_not_lsb = 0;

    always @(posedge clk) begin
        clkdiv <= clkdiv + 1;
        clkdiv_pulse <= &clkdiv;
        msb_not_lsb <= msb_not_lsb ^ clkdiv_pulse;

        if (clkdiv_pulse) begin
            if (msb_not_lsb) begin
                dout[6:0] <= ~msb_digit;
                dout[7] <= 0;
            end else begin
                dout[6:0] <= ~lsb_digit;
                dout[7] <= 1;
            end
        end
    end
endmodule