search

google / CFU-Playground

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.github.io/CFU-Playground/ For reference docs, see the link below.
http://cfu-playground.rtfd.io/
Apache License 2.0
452 stars 116 forks source link

How to print the "perf counters" when I use the FPU variant? #800

Open yoooyeah opened 1 year ago

yoooyeah commented 1 year ago

Hi! I know that if I want to show the "perf counters" in a RV32I architecture, I can easily use the "Perf Cfu" variant. However, now I want to use a FPU supported RISCV CPU, namely that I cannot use "Perf Cfu" and "Fpu Cfu" at the same time. I want to see the cycles of some floating-point operations. How to print the "perf counters" when I use the FPU variant? Thanks!

tcal-x commented 12 months ago

Hello @yoooyeah , we would need to create a new VexRiscv variant that combines those two features! They both requires some amount of resources --- do you have plenty of extra space on your target FPGA?

There are some instructions here (be warned, this is expert-level stuff, so not many contributors have attempted it, and we might have missed some stuff in the documentation): https://github.com/google/CFU-Playground/blob/main/soc/vexriscv/README.md

Basically, look at the Makefile in that directory, and create a new target that combines the flags for FPU and perf counters. There are a few other places in the system that you need to inform about the new variant.

Can you give it a try?