google / lyra

A Very Low-Bitrate Codec for Speech Compression
Apache License 2.0
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The same wav file decodes different files in different CPU architectures #81

Open liangruxing opened 2 years ago

liangruxing commented 2 years ago

I follow this example: image I change parameters:--cpu=armeabi-v7a or --cpu=arm64-v8a, to generate programs with different CPU architectures.

use --cpu=armeabi-v7a,The MD5 value of decoded file: alioth:/data/local/tmp$ md5sum 16khz_sample_000001_decoded.wav b4b6f9cff4c62615f23b3147133487cc 16khz_sample_000001_decoded.wav

The MD5 value of decoded file is b4b6f9cff4c62615f23b3147133487cc

use --cpu=arm64-v8a,The MD5 value of decoded file: alioth:/data/local/tmp$ md5sum 16khz_sample_000001_decoded.wav bf9981f4e88f4b4f1c4d9859a02f0d7f 16khz_sample_000001_decoded.wav

The MD5 value of decoded file is bf9981f4e88f4b4f1c4d9859a02f0d7f

the original wav file is same,but decoded file is different. Is this normal ?

my phone cpu info: alioth:/data/local/tmp $ cat /proc/cpuinfo Processor : AArch64 Processor rev 0 (aarch64) processor : 0 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x51 CPU architecture: 8 CPU variant : 0xd CPU part : 0x805 CPU revision : 14

processor : 1 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x51 CPU architecture: 8 CPU variant : 0xd CPU part : 0x805 CPU revision : 14

processor : 2 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x51 CPU architecture: 8 CPU variant : 0xd CPU part : 0x805 CPU revision : 14

processor : 3 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x51 CPU architecture: 8 CPU variant : 0xd CPU part : 0x805 CPU revision : 14

processor : 4 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x1 CPU part : 0xd0d CPU revision : 0

processor : 5 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x1 CPU part : 0xd0d CPU revision : 0

processor : 6 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x1 CPU part : 0xd0d CPU revision : 0

processor : 7 BogoMIPS : 38.40 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x1 CPU part : 0xd0d CPU revision : 0

Hardware : Qualcomm Technologies, Inc SM8250

alioth:/data/local/tmp $ getprop ro.build.version.release 12 alioth:/data/local/tmp $ getprop ro.build.version.sdk 31 alioth:/data/local/tmp $

aluebs commented 2 years ago

Thank you for the thorough bug report. This is most likely because of the specific ARM V7 optimizations that might use lower precision. Are the changes audible?

liangruxing commented 2 years ago

It sounds no different.

aluebs commented 2 years ago

Then I would say that it is working as intended.