Add ARM 64-bit platform support (i.e. aarch64-linux-gnu)

[Mizux]

Currently OR-Tools doesn't officially support ARM 64-bit platform. Cross-Toolchain targeted from linaro https://www.linaro.org/downloads/ -> 64-bit Armv8 Cortex-A, little-endian

note: Should fix #314

[rjurga]

Are there any major blockers, or can it be compiled on ARM with modest efforts?

[Mizux]

Well, we have a CMake based build also available so it should be possible to use it with linaro CMakeToolchainFile... The main issue is, we currently depends on CBC, PROTOBUF, GFLAGS, GLOG, ZLIB so you should also check if it compile on ARM.

Good news, since we are using add_subdirectory() for dependencies it means that Toolchain should be forwarded to dependencies so we are half the way ;)

side note: On my todo list I hope to be able to add or-tools to Yocto one days also...

[rjurga]

Thanks for the reply. Made some progress but I'm stumbling on two compilation errors.

1. In or-tools/utils/fp_utils.h, function EnableExceptions, the fenv_ struct doesn't have a __control member:

   /* Type representing floating-point environment.  */
   typedef struct
   {
   unsigned int __fpcr;
   unsigned int __fpsr;
   }
   fenv_t;

This seems to come from glic/2.27-r0.

I assume that I have to do something like this, though I'm really not sure, I'm out of my depth here:

diff --git a/ortools/util/fp_utils.h b/ortools/util/fp_utils.h
index cf239c99f..2774e7e92 100644
--- a/ortools/util/fp_utils.h
+++ b/ortools/util/fp_utils.h
@@ -81,12 +81,16 @@ class ScopedFloatingPointEnv {
 #elif defined(ARCH_K8)
     CHECK_EQ(0, fegetenv(&fenv_));
     excepts &= FE_ALL_EXCEPT;
-#ifdef __APPLE__
+# if defined(__aarch64__)
+    fenv_.__fpsr &= ~excepts;
+# else // __x86__
+#  ifdef __APPLE__
     fenv_.__control &= ~excepts;
-#else  // Linux
+#  else  // Linux
     fenv_.__control_word &= ~excepts;
-#endif
+#  endif
     fenv_.__mxcsr &= ~(excepts << 7);
+# endif
     CHECK_EQ(0, fesetenv(&fenv_));
 #endif
   }

2. Some arm code error, in file or-tools/util/saturated_arithmetic.h at line 114 in function CapAddFast:

   asm volatile(  // 'volatile': ask compiler optimizer "keep as is".
     "\t" "addq %[y],%[result]"
     "\n\t" "cmovoq %[cap],%[result]"  // Conditional move if overflow.
     : [result] "=r"(result)  // Output
     : "[result]" (result), [y] "r"(y), [cap] "r"(cap)  // Input.
     : "cc"  /* Clobbered registers */  );

Error :

{standard input}:5610: Error: unknown mnemonic `addq' -- `addq x3,x1'
{standard input}:5611: Error: unknown mnemonic `cmovoq' -- `cmovoq x2,x1'

at line 144 in CapSubFast function

asm volatile(  // 'volatile': ask compiler optimizer "keep as is".
      "\t" "subq %[y],%[result]"
      "\n\t" "cmovoq %[cap],%[result]"  // Conditional move if overflow.
      : [result] "=r"(result)  // Output
      : "[result]" (result), [y] "r"(y), [cap] "r"(cap)  // Input.
      : "cc"  /* Clobbered registers */  );

Error :

{standard input}:9267: Error: unknown mnemonic `subq' -- `subq x0,x19'
{standard input}:9268: Error: unknown mnemonic `cmovoq' -- `cmovoq x2,x19'

at line 221 in CapProdFast function

asm volatile(  // 'volatile': ask compiler optimizer "keep as is".
      "\n\t" "imulq %[y],%[result]"
      "\n\t" "cmovcq %[cap],%[result]"  // Conditional move if carry.
      : [result] "=r"(result)  // Output
      : "[result]" (result), [y] "r"(y), [cap] "r"(cap)  // Input.
      : "cc" /* Clobbered registers */);

Error :

{standard input}:126444: Error: unknown mnemonic `imulq' -- `imulq x0,x1'
{standard input}:126445: Error: unknown mnemonic `cmovcq' -- `cmovcq x2,x1'

Although they seem trivial, I do not know how to translate this for aarch64.

[Mizux]

there is a https://github.com/google/or-tools/blob/99a763f30a17ea9b92a642fb1908175c44b0ec63/ortools/util/saturated_arithmetic.h#L108

So maybe we should find why on arch arm toolchain ARCH_K8 is defined FYI: it means AMD K8 which is the first x86_64 architecture.

EDIT Maybe this to change https://github.com/google/or-tools/blob/99a763f30a17ea9b92a642fb1908175c44b0ec63/ortools/base/integral_types.h#L19-L27 i.e. does LP64 available on ARM ?

[Mizux]

Seems lp69 aka long int and pointer are 64bits is available on aarch64 Src: https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html

[fabrizioschiano]

Is there anyone who had luck in building from source OR-Tools on an ARM 64-bit architecture? I am interested in running a software package including OR-tools on a Jetson Xavier NX 64-bit.

[Mizux]

Is there anyone who had luck in building from source OR-Tools on an ARM 64-bit architecture? I am interested in running a software package including OR-tools on a Jetson Xavier NX 64-bit.

please avoid necro-posting, did you try the cross compile script ? https://github.com/google/or-tools/blob/stable/tools/cross_compile.sh

ps: we have a discord also...

[fabrizioschiano]

Sorry about that @Mizux . We did not know about the cross-compile script.