Closed brainstorm closed 4 years ago
Yes, it does have major overlap. I have seen skidl when I started work on this.
I didn't like the verbosity of skidl:
from skidl import *
# Create input & output voltages and ground reference.
vin, vout, gnd = Net('VI'), Net('VO'), Net('GND')
# Create two resistors.
r1, r2 = 2 * Part("Device", 'R', TEMPLATE, footprint='805')
r1.value = '1K'
r2.value = '500'
# Connect the nets and resistors.
vin += r1[1]
gnd += r2[2]
vout += r1[2], r2[1]
Turns into this for pcbdl:
from pcbdl import *
# new syntax as of 2 days ago
Net("VI") ^ R("1k", package='805') ^ Net("VO") ^ R("500", package="805") ^ Net("GND")
# older syntax
Net("VO") << (
R("1k", package='805', to=Net("VI")),
R("500", package="805", to=Net("GND")),
)
These files should be short and to the point, without boilerplate. When placing a resistor down, I shouldn't really care about anything about it's value and where it goes, that shouldn't need more than a few characters. These "schematics" are supposed to be friendly to non programmers.
Let me know if you have any more questions.
Isn't this software having a major overlap with SKiDL?:
https://github.com/xesscorp/skidl
/cc @xesscorp, @devbisme