Closed meheff closed 2 years ago
Currently we emit an error like:
"Output out, instance #0 not found in Verilog simulator output".
We should raise an error indicating that there was an X in the output until we handle X properly (if ever).
This was fixed a while ago. Error message generated here: https://github.com/google/xls/blob/6bfa3ed0f9d7dddeed9170c7c110b9d9487955a8/xls/simulation/module_testbench.cc#L321
Currently we emit an error like:
"Output out, instance #0 not found in Verilog simulator output".
We should raise an error indicating that there was an X in the output until we handle X properly (if ever).