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grahamedgecombe / icicle

32-bit RISC-V system on chip for iCE40 FPGAs
ISC License
301 stars 52 forks source link

'make syntax' fails miserably for me #5

Closed philtomson closed 6 years ago

philtomson commented 6 years ago

Lots of errors, here are just a few...

./rv32_control.sv:234: error: Invalid module instantiation ./rv32_control.sv:235: error: Invalid module instantiation ./rv32_control.sv:236: error: Invalid module instantiation ./rv32_control.sv:237: error: Invalid module instantiation ./rv32_control.sv:238: error: Invalid module instantiation ./rv32_control.sv:239: error: Invalid module instantiation ./rv32_control.sv:242: error: invalid module item. ./rv32_control.sv:243: syntax error

Is this normal?

Version of iverilog I'm running:

$ iverilog -v Icarus Verilog version 10.1 (stable)

I'm able to synthesize just fine.

grahamedgecombe commented 6 years ago

It needs the development version of Icarus for always_comb/always_ff support (they aren't in a stable release yet).

philtomson commented 6 years ago

Which branch do I need to checkout from their git repo?

grahamedgecombe commented 6 years ago

master

grahamedgecombe commented 6 years ago

I've added a note to the README explaining that the master branch of Icarus is required, so I'll close this issue now.