Strange behavior of startx (xorg-server) on aarch64 devices

[sajcho]

I know it doesn't belong here, but as a developer, maybe you'll help me.

Machine: Jetson TX2 (Tegra186) Kernel: 5.17.4 aarch64

After successful compilation and installation of xorg-server ver. 21.1.3 I have an interesting problem. I use startx. The first time you use startx, it starts without a problem. After logging out, I will run startx for the second time. No problem. When I try it after the third X will no longer run and the error message "AddScreen / ScreenInit failed for driver 0" will appear in xorg.log. After the system restarts, the situation repeats. Twice okay. Third - "AddScreen / ScreenInit failed for driver 0".

Question: Where should I start to address this issue?

I have the same installed on an x86 machine. I have no problem here.

[digetx]

Do you see any errors in KSMG?

[sajcho]

I went through all the log files. The only difference between a successful startx and a failed startx is the message

6589a6590

2022-05-22T19: 06: 47.76947 kern.err: [781.507639] drm drm: failed to allocate buffer of size 8294400

[sajcho]

digetx It's a kernel bug or it's my fault?

[digetx]

That is kernel bug.

[sajcho]

Temporary solution: add kernel cmdline parameter cma=256M

[digetx]

I'd expect IOMMU to work on TX2, hence CMA shouldn't be used. Do you have IOMMU disabled by any chance?

[sajcho]

Output:

$ zcat /proc/config.gz | grep IOMMU

CONFIG_IRQ_MSI_IOMMU=y CONFIG_VFIO_IOMMU_TYPE1=y # CONFIG_VFIO_NOIOMMU is not set CONFIG_IOMMU_IOVA=y CONFIG_IOMMU_API=y CONFIG_IOMMU_SUPPORT=y # Generic IOMMU Pagetable Support CONFIG_IOMMU_IO_PGTABLE=y CONFIG_IOMMU_IO_PGTABLE_LPAE=y # CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set # CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set CONFIG_IOMMU_DEFAULT_DMA_STRICT=y # CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set # CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set CONFIG_OF_IOMMU=y CONFIG_IOMMU_DMA=y CONFIG_TEGRA_IOMMU_SMMU=y # CONFIG_VIRTIO_IOMMU is not set

#####################################

$ dmesg | grep iommu

[ 0.874422] iommu: Default domain type: Translated [ 0.874427] iommu: DMA domain TLB invalidation policy: strict mode [ 0.963708] arm-smmu 12000000.iommu: probing hardware configuration... [ 0.963726] arm-smmu 12000000.iommu: SMMUv2 with: [ 0.963740] arm-smmu 12000000.iommu: stage 1 translation [ 0.963751] arm-smmu 12000000.iommu: stage 2 translation [ 0.963762] arm-smmu 12000000.iommu: nested translation [ 0.963774] arm-smmu 12000000.iommu: stream matching with 128 register groups [ 0.963791] arm-smmu 12000000.iommu: 64 context banks (0 stage-2 only) [ 0.963809] arm-smmu 12000000.iommu: Supported page sizes: 0x61311000 [ 0.963822] arm-smmu 12000000.iommu: Stage-1: 48-bit VA -> 48-bit IPA [ 0.963837] arm-smmu 12000000.iommu: Stage-2: 48-bit IPA -> 48-bit PA [ 0.964032] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1809; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964053] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001809, GFSYNR2 0x00000000 [ 0.964069] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0xc09; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964080] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000c09, GFSYNR2 0x00000000 [ 0.964096] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1409; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964106] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001409, GFSYNR2 0x00000000 [ 0.964123] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1009; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964132] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001009, GFSYNR2 0x00000000 [ 0.964147] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x9; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964156] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000009, GFSYNR2 0x00000000 [ 0.964169] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0xc09; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964180] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000c09, GFSYNR2 0x00000000 [ 0.964197] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1809; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964208] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001809, GFSYNR2 0x00000000 [ 0.964226] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0xc09; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964237] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00000c09, GFSYNR2 0x00000000 [ 0.964252] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1009; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964263] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001009, GFSYNR2 0x00000000 [ 0.964277] arm-smmu 12000000.iommu: Blocked unknown Stream ID 0x1009; boot with "arm-smmu.disable_bypass=0" to allow, but this may have security implications [ 0.964288] arm-smmu 12000000.iommu: GFSR 0x80000002, GFSYNR0 0x00000000, GFSYNR1 0x00001009, GFSYNR2 0x00000000 [ 0.988964] tegra-bpmp bpmp: Adding to iommu group 0 [ 2.981779] tegra-pcie 10003000.pcie: Adding to iommu group 1 [ 3.017843] pcieport 0000:00:01.0: Adding to iommu group 1 [ 3.018220] nvme 0000:01:00.0: Adding to iommu group 1 [ 3.458087] tegra-ahci 3507000.sata: Adding to iommu group 2 [ 3.734747] sdhci-tegra 3440000.mmc: Adding to iommu group 3 [ 3.734843] sdhci-tegra 3460000.mmc: Adding to iommu group 4 [ 3.796937] tegra-xusb 3530000.usb: Adding to iommu group 5 [ 3.835460] sdhci-tegra 3400000.mmc: Adding to iommu group 6 [ 5.815470] tegra-audio-graph-card sound: Adding to iommu group 7 [ 5.986876] tegra-hda 3510000.hda: Adding to iommu group 8 [ 5.998587] tegra-host1x 13e00000.host1x: Adding to iommu group 9 [ 6.022061] tegra-xudc 3550000.usb: Adding to iommu group 10 [ 6.115736] dwc-eth-dwmac 2490000.ethernet: Adding to iommu group 11 [ 6.607916] tegra-dc 15200000.display: Adding to iommu group 12 [ 6.618807] tegra-dc 15210000.display: Adding to iommu group 12 [ 6.626881] tegra-dc 15220000.display: Adding to iommu group 12 [ 6.642820] tegra-vic 15340000.vic: Adding to iommu group 13 [ 6.643916] tegra-nvdec 15480000.nvdec: Adding to iommu group 14

[sajcho]

digetx What is your opinion on this solution? Its a big problem?

[digetx]

Looks like IOMMU should work. @cyndis @thierryreding Do you know why would Tegra DRM use CMA on TX2?

[sajcho]

I don't know why cma=256M solves this problem. I'm not a developer. I consulted this problem with Thierry and he suggested this solution. I have not seen any side effects when using cma=256M. Development will show what happens next.