gtjennings1 UPDuino_v2_0 issues - Githubissues

gtjennings1 / UPDuino_v2_0

UPDuino v2.0 - PCB Design Files, Designs, Documentation

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Cannot "Detect Cable" in diamond programmer

#5 mattroos closed 4 years ago
2
Port Instructions from `.docx` to `.md`

#4 meawoppl closed 4 years ago
8
Implement Neural Networks using UPDuino

#3 alex934 opened 5 years ago
0
open source license missing

#2 tinyfpga opened 6 years ago
2
12Mhz clock source from FTDI as external clock for FPGA PLL?

#1 fanoush opened 6 years ago
3