Open paulrouget opened 2 years ago
Hi Paul, I haven't personally work on our microcontroller runtime, but you can read about our level of support in the ewasm paper (http://www.jahrhundert.net/papers/ewasm-paper-EMSOFT2020-CR.pdf). The evaluations were run on a Cortex-M4F, with 1MiB Flash and 256KiB SRAM. There are some figures detailing RAM and ROM sizes. As I understand it, the wasm page size is specified as 64 KiB, but we relaxed standards compliance to get around that. The RAM requirements vary based on the bounds-checking method. I suspect we'll struggle to run on something with only 64 KiB, but other researchers might have a different opinion.
One thing worth mentioning is that ewasm predated WASI and uses wasmception. I've been working on WASI support, but I haven't touched the microcontroller parts of the codebase. One of our new PhD students is ramping up in this area and will be handling this. Hard to say what the memory impact of this would be, but I'll be surprised if we can support anything beyond small benchmark code in under 64k.
Would this work on a nRF52832 chip (512KB Flash, 64KB RAM)?
Has the footprint of the runtime been measured?