Micro-architecture categorisation

[GuillaumeDIDIER]

I have written, (during my PhD) a piece of code that categorise micro-architectures from the CPUID Vendor, Family, Model and stepping, (e.g. detect Skylake, Coffee Lake, Ice Lake, etc), currently only supporting Intel architectures (but that I mean to extend to support AMD micro-arch too). It is based of Intel SDM / Optimization Manual (and cross checked on WikiChip)

Do you think such a feature would belong in this crate ? (I could obviously make my own crate too).

If so, I'll probably start working on a PR to integrate it here.

[gz]

Hey, definitely I think that would be a great addition. Thanks for bringing this up!

[GuillaumeDIDIER]

Well, I’ll work on this, then.

Any opinions on the API design? (One subtle issue I see is that Intel has a lot of micro-architectural variants of Skylake Kaby Lake (named Coffee Lake, Whiskey Lake, and friends).

Right now I have a big enum of all the micro-arch as a return value.

[gz]

Right now I have a big enum of all the micro-arch as a return value.

Yea that seems like it's probably the right way to go.

Intel has a lot of micro-architectural variants of Skylake Kaby Lake (named Coffee Lake, Whiskey Lake, and friends).

Yep, I've run into them too, it's kind of a mess unfortunately.

[GuillaumeDIDIER]

After double checking my copies of the Intel SDM and Optimization Manual, it seems stuff like Amber Lake and Whisky Lake aren't mentioned in it.

https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures has a neat table, and wikichip has detailed CPUID identification for each codename (and even sometime more detailed product family).

I'm wondering if there's a way to preserve the hierarchical property (nested enum aka this is a Skylake Core, and more precisely a Comet Lake, (and even Comet Lake-W)) ?

(Also wondering if there's a way to attach some metadata. Process node are an example whose utility is probably dubious)

[GuillaumeDIDIER]

And there's also the immense fun of heterogenous architecture, with Alder Lake combing Golden Cove & Gracement cores.

[mert-kurttutan]

After double checking my copies of the Intel SDM and Optimization Manual, it seems stuff like Amber Lake and Whisky Lake aren't mentioned in it.

https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures has a neat table, and wikichip has detailed CPUID identification for each codename (and even sometime more detailed product family).

I'm wondering if there's a way to preserve the hierarchical property (nested enum aka this is a Skylake Core, and more precisely a Comet Lake, (and even Comet Lake-W)) ?

(Also wondering if there's a way to attach some metadata. Process node are an example whose utility is probably dubious)

I am also interested in this feature. So, in case it might be helpful, I suggest another database for the list of CPUs (see the link below).

http://cpudb.stanford.edu/visualize

[GuillaumeDIDIER]

I am also interested in this feature. So, in case it might be helpful, I suggest another database for the list of CPUs (see the link below).

http://cpudb.stanford.edu/visualize

That DB is indeed useful, though it seems to lack the key part of CPUID Family Model (and stepping). But i'll try to make sure my classification gets as close as possible.

It also seems to stop a few years back, there's no Zen µarch, and same thing, none of the recent Intel stuff.

[Umio-Yasuno]

After double checking my copies of the Intel SDM and Optimization Manual, it seems stuff like Amber Lake and Whisky Lake aren't mentioned in it.

https://en.wikipedia.org/wiki/List_of_Intel_CPU_microarchitectures has a neat table, and wikichip has detailed CPUID identification for each codename (and even sometime more detailed product family).

I'm wondering if there's a way to preserve the hierarchical property (nested enum aka this is a Skylake Core, and more precisely a Comet Lake, (and even Comet Lake-W)) ?

(Also wondering if there's a way to attach some metadata. Process node are an example whose utility is probably dubious)

I have made similar lists before.

https://github.com/Umio-Yasuno/cpuid_dump_rs/blob/main/lib/codename/codename_intel.rs#L292

In conclusion, I think that they can be determined by the CPUID stepping.

https://github.com/torvalds/linux/blob/master/arch/x86/include/asm/intel-family.h#L116