CIA control registers 14 and 15

[dirkwhoffmann]

According to the source code,

case 0xE:cia->cra = cia->cra | value;break;//cra
case 0xF:cia->crb = cia->crb | value;break;//crb

case 0xE:value = cia->cra;cia->cra=0;break;//cra
case 0xF:value = cia->crb;cia->crb=0;break;//crb

the registers can only be written to with 1's and they are cleared on read. Are you sure that this is the right behaviour? The C64 CIA's don't behave this way and as far as I know, the Amiga CIAs only differ from them by having the TODs replaced by additional 24 bit counters.

[h5n1xp]

Before this project I had never programmed the CIAs.

I’m actually really embarrassed by the code here as it is based entirely on observing what AmigaOS is doing with the registers.

I would defer to your greater experience and understanding!

[h5n1xp]

From the HRM:

http://amigadev.elowar.com/read/ADCD_2.1/Hardware_Manual_guide/node0147.html

All unused register bits are unaffected by a write and forced to 0 on a read.

I read this to mean that it was possible to set the bits individually, but the only way to clear them is by reading the register.

But now I see that there is an unused bit, which this line is probably referring to!

So is this just a normal read write register?

[dirkwhoffmann]

The HRM quote only means that the unused bits read back as 0, regardless what they were written to.

[dirkwhoffmann]

Regarding the emulators: You got yours booting 👍. I‘m not even coming to the Disk & hand screen 🤧.

[h5n1xp]

The HRM quote only means that the unused bits read back as 0, regardless what they were written to.

Now you point this out, it seems obvious 😂

I will adjust their behaviour to be just normal read/write registers... I guess nothing important depended upon their correct behaviour 🤷🏻‍♂️

[h5n1xp]

Regarding the emulators: You got yours booting 👍. I‘m not even coming to the Disk & hand screen 🤧.

My Memory.c file is s horrible mess of conditionals and masks because I found that AmigaOS is a real pest when it tried to establish how much RAM is present; It does so by writing to a memory location and then reading back from another (due to incomplete address decoding), this will return wither the value written or a shadow of another memory location... it’s a mess... I rewrote that file 3 times, to clean it up, it never worked after the rewrites. It just wouldn’t boot.

[dirkwhoffmann]

I bet the Timer B interrupt during boot will go away. I was hunting this IRQ all day, behause vAmiga didn‘t trigger it.

[h5n1xp]

Fixed now! Thanks for squishing this long standing, but hidden bug!