SparkleTilt PCB - Githubissues

karmanyaahm commented 11 months ago

w = won't fix atm, might come back to later; check/x = fixed;

known issues (unpleasant but not dealbreakers, retroactively fixable):

[w] broken fragment links: h3 tags don't have IDs so can't be linked with #fragment (there are two, ground plane, pt 2, the voltage dillema, pt 3) #169
[w] Prerequisites link to external (kinda mid) KiCAD video; the video is acceptable, one made by us would be epic
[x] Prereqs are probably not complete
[ ] Verified duration. Pulled the '68 hour' time estimate out of thin air
[x] "workshop" -> "jam"; link hacker card jam
[x] turn the images upside down for sparkletilt, not longhorn led level
[x] clarify that part 4 price does not include peripherals
[x] track size menu in pt 2
[x] USB_P from pt 1 should be VBUS; critical, dealbreaker
[x] crop diff pair from pt 2 setup image

Review from IceChes (hope its fine to make this public lol) (no dealbreakers afaict, retroactively fixable):

[x] Needs a better explanation of decoupling/bypass capacitors.
[x] It might be good to make a footnote about using the atmega's internal RC oscillator
[w] Using MISO/MOSI/SCK instead of 11/12/13 may make things slightly clearer.; for ICSP header? yeah ig but editing images is too much work
[x] I like that you explained what the components on the USBC port do a lot.
[x] 0805 on top; i think i fixed???
[w] You no longer need to add LCSC part numbers most of the time to the footprint assignment/BOM.; personally had a bad experience, maybe they updated tool in last few months but I'd have to check
[x] A better explanation of what a footprint is would be great.; fixed somewhat???
[x] Add some explanation for the trace/via sizes you chose, currently they seem a bit arbitrary.
[x] I can't tell if you explained what a via is, sorry if I missed it. If I didn't miss it, please add that lol.
[w] Add a note saying that V can also be used as a hotkey for switching layers.; already mentioned in two-layer routing
[ ] Add a note saying that to fix the thermal relief connection thing you can change the thermal connection value to 1 in... some setting menu I don't remember.; TODO, I also can't find it
[w ] Show off the raytracing feature please!;won't fix, rescreenshotting everything will take forever
[x] Add a note before stage 4 saying that this part is a bit more advanced.

from Arpan:

[x] put part ids in brackets pt 1
[x] explain that JLC can assemble handsolder footprints, handsolder doesn't mean must handsolder.

here dealbreaker = error that will break the board; forgetting to explain vias is a pretty big oof, going to fix that on monday

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vercel[bot] commented 11 months ago

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Name	Status	Preview	Comments	Updated (UTC)
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hackclub / jams