Closed dhylands closed 8 years ago
This example runs using the HSI clock which is 16 MHz. This means that we need to pass 16 in rather than 25.
I confirmed (with my Logic analyzer) that with this patch that the timings are correct on the STM32FDISC board which uses an STM32F407.
Thanks for the fix.
This example runs using the HSI clock which is 16 MHz. This means that we need to pass 16 in rather than 25.
I confirmed (with my Logic analyzer) that with this patch that the timings are correct on the STM32FDISC board which uses an STM32F407.