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hansfbaier / adat-usb2-audio-interface

FPGA based USB 2.0 high speed audio interface featuring multiple optical ADAT inputs and outputs
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USB interface #5

Closed danielkucera closed 2 years ago

danielkucera commented 2 years ago

Hello, I like this project and would like to reproduce it with qmtech spartan 6 board. Can I use USB3300 for USB interface or is there some special feature of 3320 being used?

If so, don't you happen to have one extra unpopulated PCB to sell?

Thank you.

hansfbaier commented 2 years ago

The USB3300 cannot be clocked by the FPGA, it needs its own clock, so we really need the USB3320. The USB3320 is still in stock at JLCPCB: image AFAIK Spartan 6 only works with ISE, and I tried to build the design with ISE (for Kintex 7), but the placer failed with the PLL placement. So before ordering any hardware, I would suggest to try to adapt the Kintex branch to use ISE to build Spartan 6. Only if that succeeds, then you might start thinking about the hardware.

danielkucera commented 2 years ago

Thank you, and what about the PCB to sell?

hansfbaier commented 2 years ago

@danielkucera I edited the post above, please read...

danielkucera commented 2 years ago

Okay, I'll try that first. Thanks.

hansfbaier commented 2 years ago

Also, I don't have a platform file for the Spartan 6 board here: https://github.com/amaranth-community-unofficial/amaranth-boards You would have to write one. Which is not very hard, when you follow the existing example (eg the Kintex board). You just need to fill in all the correct pin names from the board schematics or the example ucf files.

danielkucera commented 2 years ago

I stuck on this error:

ERROR:HDLCompiler:1654 - "/tmp/tmp4pxd9uc8/top.v" Line 13503: Instantiating <audiopll> from unknown module <ALTPLL>
Module car remains a blackbox, due to errors in its contents

and then I realized porting to Xilinx would require whole clock generation rewrite: https://github.com/hansfbaier/adat-usb2-audio-interface/blob/main/gateware/car.py#L49

So putting this on hold indefinitely.

But I wonder if there is a way in amaranth to write a portable code to generate clocks...

hansfbaier commented 2 years ago

No amaranth does not provide that. The PLLs of each FPGA are quite different. Even Cyclone V is not compatible with Cyclone IV. Try building with --keep To examine the build . ALTPLL is for Intel FPGAs, that won't work with Xilinx

fritzbauer commented 2 years ago

There is an open issue to allow for portable clocks in amaranth: https://github.com/amaranth-lang/amaranth/issues/425

danielkucera commented 2 years ago

You mean like this?

python3 adat_usb2_audio_interface.py --keep

The result is the same.

hansfbaier commented 2 years ago

Yes, but then you can look into the log files to find out about why it failed

On Wed, Jan 26, 2022, 14:09 Daniel Kucera @.***> wrote:

You mean like this?

python3 adat_usb2_audio_interface.py --keep

The result is the same.

— Reply to this email directly, view it on GitHub https://github.com/hansfbaier/adat-usb2-audio-interface/issues/5#issuecomment-1021925427, or unsubscribe https://github.com/notifications/unsubscribe-auth/AABEI77KJMH7AUPBN3N6MYDUX6M3RANCNFSM5MZP5MAA . You are receiving this because you commented.Message ID: @.***>