clarify dump bit behavior

harp-tech / protocol

Description of the Harp protocol.

https://harp-tech.org/protocol/BinaryProtocol-8bit.html

MIT License

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clarify dump bit behavior #6

Closed Poofjunior closed 6 months ago

Poofjunior commented 9 months ago

Addresses https://github.com/harp-tech/protocol/issues/5

Clarifies the behavior of what Harp devices do when the R_OPERATION_CTRL DUMP bit is written to.

filcarv commented 8 months ago

I'm not sure if we need to have this part in the text, because reply to a WRITE message is part (bold) of the default communication.

When written to 1, the device replies with a harp WRITE reply from this register, followed by a series of READ replies for all core and app registers, one reply per register. This bit is always read as 0.

Poofjunior commented 8 months ago

@filcarv right, but since writing to this message additionally includes one READ reply per register, it's unclear whether the default WRITE reply should happen at the beginning, the end, at any point, or even at all.

glopesdev commented 6 months ago

Feedback from SRM meeting:

Should registers be returned in order (feedback was that it doesn't
Device should return a WRITE reply to the command
Device should then return N replies. Should registers be returned in order? Currently in ATMEL implementation common and user registers are in different places:
- From 1 to 15, then 32 to N
- Replies are interleaved in time not to overload the CPU
  - also some registers might take non-insignificant time to read, e.g. ADC