hdl-util / hdmi

Send video/audio over HDMI on an FPGA
https://purisa.me/blog/hdmi-released/
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Synth small problem #8

Closed LMN128 closed 4 years ago

LMN128 commented 4 years ago

Hi,

Thanks a lot for new version and changes. I tried last version and there is small problem to synthesis it. First, Vivado doesn't support parameter string, bud it easy to resolve it by deleting "string" words. Second, there is general problem if use 16bits audio bit width instead of 24bit there is error:

[Synth 8-659] type mismatch in assignment: bit [15:0]A[1:0] vs. bit [23:0]B[1:0] ["C:/temp/DV/DV.srcs/sources_1/new/packet_picker.sv":78]

with 24bits is synthesizable.

Thanks

sameer commented 4 years ago

First, Vivado doesn't support parameter string, bud it easy to resolve it by deleting "string" words.

Ok, good to know. I've seen it in Intel params so I assumed Vivado would support it too.

Second, there is general problem if use 16bits audio bit width instead of 24bit there is error:

[Synth 8-659] type mismatch in assignment: bit [15:0]A[1:0] vs. bit [23:0]B[1:0] ["C:/temp/DV/DV.srcs/sources_1/new/packet_picker.sv":78]

with 24bits is synthesizable.

Looks like Quartus will allow truncation without a hard fail, but Vivado does not.

I'll push a commit to fix this soon. I should start testing with Vivado simulation in Travis CI, do you know if it's possible to get the simulation tool standalone?

sameer commented 4 years ago

Also, because the type is not string now, you can't use null padding unfortunately:

"Unknown\0"

must become

{"Unknown", 8'd0}
LMN128 commented 4 years ago

Great. Synth is OK. Thanks a lot.