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hdl-util / hdmi

Send video/audio over HDMI on an FPGA
https://purisa.me/blog/hdmi-released/
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End-to-end "top_tb" test overhaul #9

Closed sameer closed 4 years ago

sameer commented 4 years ago

Adding the tmds sync chain in f182e6e03e502bed7fa6b768b1d3a86b2e10abec broke tests. The code still works fine, but the end-to-end testbench with a faked HDMI sink needs to watch ONLY tmds_clk and tmds_data. It can't rely on any clocks created by the HDMI source, and needs to be fully black-box now, since the sync chain can't be easily compensated for.

sameer commented 4 years ago

So this was a lot simpler than I thought, took ~5 minutes. In the future though if HDMI sink is implemented, the two could be connected as a legit end to end test.