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hdl / bazel_rules_hdl

Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Apache License 2.0
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Add/support VHDL #17

Open mithro opened 3 years ago

mithro commented 3 years ago

Create good support for VHDL.

mithro commented 3 years ago

@umarcor -- This is your cup of tea, right?

umarcor commented 3 years ago

It is. It's as "simple" as providing GHDL (for simulation) plus ghdl-yosys-plugin for synthesis and formal verification. Hence, this issue depends on #2 (Yosys) and #9 (Symbiyosys). For mixed-language simulation, it can be combined with Verilator (#5): https://github.com/ghdl/ghdl/issues/1512#issuecomment-731712474.

solsjo commented 2 years ago

Hi!

Stumbled on this issue and wondered if it could be of help.

I wrote Bazel rules for vunit and ghdl, albeit only for simulation, not for synthesis. It builds ghdl from source but is dependent on llvm and gnat.

rules_ghdl

Though I don't have a gut feeling for the work needed to integrate with ghdl yosys.

Just thought it might be of interest.

mithro commented 2 years ago

@solsjo - It would be great to add this to this repo even if only for simulation.