Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Apache License 2.0
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Make power estimate more accurate by reading SDC first #314
This only affects the verilog_based_power_results which is not recommended to be used for evaluation. The main benchmarking was added in #302.