search

hercules-390 / hyperion

Hercules 390
Other
251 stars 70 forks source link

Alignment in REGS structure #229

Open PeterCoghlan opened 7 years ago

PeterCoghlan commented 7 years ago

I wanted to make an experimental change to the REGS structure defined in hstructs.h. I read the comments which emphasised how important alignment to cache boundaries is within this structure and tried to make my change in accordance with them. However, I discovered that the members of REGS are not aligned in the way that the comments suggest they should be.

Everything looks ok up as far as px at offset 0x70. However, the next member, psw is at offset 0x78, not at offset 0x80 as suggested in the comments. If the comments are correct, psw ends up straddling a cache boundary.

After that, everything looks good up as far as fpr at offset 0x340 but the next member, fpc, is at offset 0x3C0, not 0x380 and everything gets a bit messy after that.

Things come right again at tod_epoch but the comments saying there is a cache boundary ahead of cpupct seem to be 8 bytes too early.

jphartmann commented 7 years ago

I thought about that too, but you are likely chasing a ray of sunshine here, at least in the UNIX world. Problem is 32 vs. 64 bit and size of long vs size of pointer. So it is hard to predict where you are in storage in general. Of course, cache line sizes vary too.

PeterCoghlan commented 7 years ago

It would be great if the comments and the code were consistent with each other. Any rays of sunshine caught would be a bonus.