ERROR: Command syntax error: This version of Yosys is built without Verific support.

[Lucas-Wye]

ERROR: Command syntax error: This version of Yosys is built without Verific support.

> read -verific
>      ^

How to install the verific?

[fangwenji]

We used the commercial version of Yosys that supports full SystemVerilog grammars with this 'verific' command. If you are dealing with Verilog files or some simple SV grammars, you may replace it with the 'read_verilog' command.

[Lucas-Wye]

can't work with read_verilog, because the generated files contain many symbols like:

(* top =  1  *)
(* src = "../example/verilog/TinyRocket/chipyard.TestHarness.TinyRocketConfig.top.v:123305.3-123791.6" *)

[fangwenji]

directly deleting these comments will make it work well, you may refer to the 'vlg_clean()' function in the 'ys_script/clean_vlg.py' file.

[Lucas-Wye]

OK, thx.

I also write a script to deal with it:

import re

def remove_lines_with_pattern(file_path,out_file_path, pattern):
    with open(file_path, 'r') as file:
        lines = file.readlines()
    lines = [line for line in lines if not re.search(pattern, line)]

    with open(out_file_path, 'w') as file:
        file.writelines(lines)

file_path = ''
out_file_path = ''

pattern = '\(\*.*\*\)'

remove_lines_with_pattern(file_path,out_file_path, pattern)