Open iceblu3710 opened 3 years ago
Anything is possible, but this sounds like quite a lot of work (I'm just using a standard Z80 VHDL core).
How do you switch banks at the moment?
It might be easier to do this kind of customization with the Z80Decoder (that I mentioned in #18). That's written in standard C, and does memory modelling (with a 64KB address space). It would be straightforward for you to extend this to a 512KB address space if you can program in C.
I was thinking of adding it to the softAVR8 core. It would only need to be sampled while the softZ80 is interrupted so speed is not an issue.
I have no fpga experience but if I can map fpga io to a softAVR8 port I can just do it as an additional doCmd routine.
On Fri., Jan. 1, 2021, 11:40 a.m. David Banks, notifications@github.com wrote:
Anything is possible, but this sounds like quite a lot of work (I'm just using a standard Z80 VHDL core).
How do you switch banks at the moment?
It might be easier to do this kind of customization with the Z80Decoder (that I mentioned in #18 https://github.com/hoglet67/AtomBusMon/issues/18). That's written in standard C, and does memory modelling (with a 64KB address space). It would be straightforward for you to extend this to a 512KB address space if you can program in C.
— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub https://github.com/hoglet67/AtomBusMon/issues/19#issuecomment-753350419, or unsubscribe https://github.com/notifications/unsubscribe-auth/AABNYAWQHJDYWTHBX3OELW3SXYCIJANCNFSM4VQLYZQA .
I have a system with (6) 64k rom chips and (2) 64k ram chips an a "novel" custom MMU and messaging structure that allows paging the entire system memory map in/out. When disassembling it is difficult to know what chip I am currently working with.
Is there a way to add an instruction like mbu (memory bank used) and have it just sample 8 spare pins and report a bitfield of the pin statuses? It would be awesome to integrate into the system so
(2)C2B2 : LDA #29
and you know mem2 is active.