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hoglet67 / AtomBusMon

This project is an open-source In-Circuit Emulator for the 6502, 65C02, Z80, 6809 and 6809E 8-bit processors. See:
https://github.com/hoglet67/AtomBusMon/wiki
GNU General Public License v3.0
99 stars 21 forks source link

Ability to 'override' memory reads (typically ROM memory) from Software #20

Closed jessaskey closed 3 years ago

jessaskey commented 3 years ago

My secondary use case for an ICE is to troubleshoot new code that is being published and tested on the target hardware. I use MAME with an appropriate hardware driver to do virtual testing first, and then, by burning new ROM's I can test on the target hardware. The ICE allows me to debug that code nicely. However the step of erasing and reprogramming 4-6 ROM's each time takes about 30 minutes and any small change in the compiled code may change all of them.

If I were to remove all the Physical ROM's from the target hardware, which would leave the data bus un-driven. Is there a possibility for the ICE to have a binary file equivalent (stored on the PC or in FPGA memory?) that would effectively 'replace' the CODE being read? In theory it could be the entire 64K memory space but in practice it would be typically a smaller subset of that space (16-32K)

This is eerily similar to the 6502 EXEC command you implemented and my guess is that due to the core structure, having the ability to intercept the Data Bus like this is problematic on the current cores?

I would be willing to help code this under advisement. I do have hardware, assembly and C# skills, just not VHDL or much C proper, but Im a learner!

hoglet67 commented 3 years ago

The work to support this is mostly on the hardware side - the commands to upload code (SREC and LOAD) already exist.

Which FPGA Board are you using?

Unfortunately, there's not really sufficient FPGA Block RAM on the GODIL do this. On the EEPIZZA board, with the larger XC6SLX9 FPGA, you might be able to make 32KB available, if you shrunk the event FIFO.

Another way to do this is to simply replace the ROMs with a small plug-on RAM module, and a flying leader for WE.

Dave

jessaskey commented 3 years ago

Im on the EEPIZZA. Your point about throwing in some RAM is certainly doable and is a solid idea... I was looking to do it without physical hardware ideally.

Since Im not that familiar with the FPGA code, are there architechtural challenges in order to map CPU Address/Data to that RAM or is it just a matter of getting things set up properly as far as a flag and some defines on the array mapping (and minimizing FIFO like you said).

Im jumping the gun a bit as I don't even have my ICE running yet and communicating with my PC... but I finally got my sockets today so maybe tonight finally! thank you.

jessaskey commented 3 years ago

I closed this comment. Im just learning and I wasn't sure my issue was above was appropriate to clog the forums on startdot so I put it here. I understand the proposal you made and I will bring it up again perhaps after I understand more etc.

Another thing to consider is that just a couple weeks ago here on GitHub, the 'Discussions' feature was added as an option for for repositories and so for source code type of conversations it may be useful to turn that feature on?

thank you!