Open cctsao1008 opened 2 years ago
What is available on github is what I have for the project.
Got it, Thank you.
Raspberry Pi
Jetson Nano
typedef struct _pin_type_t
{
char *pin_name;
uint16_t linux_pin_num;
uint16_t wiringpi_pin_num;
uint16_t jetson_pin_num;
} pin_type_t;
pin_type_t pin[PIN_MAX] =
{
/* PIN_CLK */ {.linux_pin_num = TEGRA_GPIO(J, 6), .wiringpi_pin_num = 29, .jetson_pin_num = 40},
/* PIN_RESET */ {.linux_pin_num = TEGRA_GPIO(G, 3), .wiringpi_pin_num = 27, .jetson_pin_num = 36},
/* PIN_ALE */ {.linux_pin_num = TEGRA_GPIO(V, 0), .wiringpi_pin_num = 26, .jetson_pin_num = 32},
/* PIN_IO_M */ {.linux_pin_num = TEGRA_GPIO(C, 3), .wiringpi_pin_num = 10, .jetson_pin_num = 24},
/* PIN_DTR */ {.linux_pin_num = TEGRA_GPIO(C, 4), .wiringpi_pin_num = 11, .jetson_pin_num = 26},
/* PIN_BHE */ {.linux_pin_num = TEGRA_GPIO(B, 5), .wiringpi_pin_num = 6, .jetson_pin_num = 22},
/* PIN_INTR */ {.linux_pin_num = TEGRA_GPIO(J, 5), .wiringpi_pin_num = 28, .jetson_pin_num = 38},
/* PIN_INTA */ {.linux_pin_num = TEGRA_GPIO(C, 2), .wiringpi_pin_num = 31, .jetson_pin_num = 28},
/* PIN_AD0 */ {.linux_pin_num = TEGRA_GPIO(B, 4), .wiringpi_pin_num = 25, .jetson_pin_num = 37},
/* PIN_AD1 */ {.linux_pin_num = TEGRA_GPIO(J, 4), .wiringpi_pin_num = 24, .jetson_pin_num = 35},
/* PIN_AD2 */ {.linux_pin_num = TEGRA_GPIO(E, 6), .wiringpi_pin_num = 23, .jetson_pin_num = 33},
/* PIN_AD3 */ {.linux_pin_num = TEGRA_GPIO(Z, 0), .wiringpi_pin_num = 22, .jetson_pin_num = 31},
/* PIN_AD4 */ {.linux_pin_num = TEGRA_GPIO(S, 5), .wiringpi_pin_num = 21, .jetson_pin_num = 29},
/* PIN_AD5 */ {.linux_pin_num = TEGRA_GPIO(B, 5), .wiringpi_pin_num = 30, .jetson_pin_num = 27},
/* PIN_AD6 */ {.linux_pin_num = TEGRA_GPIO(C, 2), .wiringpi_pin_num = 14, .jetson_pin_num = 23},
/* PIN_AD7 */ {.linux_pin_num = TEGRA_GPIO(C, 1), .wiringpi_pin_num = 13, .jetson_pin_num = 21},
/* PIN_A8 */ {.linux_pin_num = TEGRA_GPIO(C, 0), .wiringpi_pin_num = 12, .jetson_pin_num = 19},
/* PIN_A9 */ {.linux_pin_num = TEGRA_GPIO(Y, 2), .wiringpi_pin_num = 3, .jetson_pin_num = 15},
/* PIN_A10 */ {.linux_pin_num = TEGRA_GPIO(B, 6), .wiringpi_pin_num = 2, .jetson_pin_num = 13},
/* PIN_A11 */ {.linux_pin_num = TEGRA_GPIO(G, 2), .wiringpi_pin_num = 0, .jetson_pin_num = 11},
/* PIN_A12 */ {.linux_pin_num = TEGRA_GPIO(BB, 0), .wiringpi_pin_num = 7, .jetson_pin_num = 7 },
/* PIN_A13 */ {.linux_pin_num = TEGRA_GPIO(J, 2), .wiringpi_pin_num = 9, .jetson_pin_num = 5 },
/* PIN_A14 */ {.linux_pin_num = TEGRA_GPIO(J, 3), .wiringpi_pin_num = 8, .jetson_pin_num = 3 },
/* PIN_A15 */ {.linux_pin_num = TEGRA_GPIO(G, 0), .wiringpi_pin_num = 15, .jetson_pin_num = 8 },
/* PIN_A16 */ {.linux_pin_num = TEGRA_GPIO(G, 1), .wiringpi_pin_num = 16, .jetson_pin_num = 10},
/* PIN_A17 */ {.linux_pin_num = TEGRA_GPIO(J, 7), .wiringpi_pin_num = 1, .jetson_pin_num = 12},
/* PIN_A18 */ {.linux_pin_num = TEGRA_GPIO(DD, 0), .wiringpi_pin_num = 4, .jetson_pin_num = 16},
/* PIN_A19 */ {.linux_pin_num = TEGRA_GPIO(B, 7), .wiringpi_pin_num = 5, .jetson_pin_num = 18}
};
I have added the Kicad files to the github repository. You may find what you're looking for there. https://github.com/homebrew8088/pi86/tree/main/Kicad/Single%20Int
On Tue, Jul 19, 2022 at 10:49 AM cctsao1008 @.***> wrote:
[image: image] https://user-images.githubusercontent.com/543608/179805474-8039f2f1-307b-4e11-b25c-aa68cbe95f2c.png [image: image] https://user-images.githubusercontent.com/543608/179805549-0ce32166-51ee-465b-981e-85a66fab27b3.png [image: image] https://user-images.githubusercontent.com/543608/179805633-728dbcf8-9078-4a17-a857-d00e24c62dea.png
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Test the GPIO speed using mmap()
Jetson Nano
I have never tested where as I don't have the equipment. The read out your showing is what I have suspected for a couple of years. 250KHz and not exactly a nice even constant cycle.
Change the Linux kernel to the PREEMPT_RT kernel
REF :
Test the GPIO 40 :
...
#define MY_PRIORITY (49) /* we use 49 as the PRREMPT_RT use 50
as the priority of kernel tasklets
and interrupt handler by default */
int main(int argc, char **argv)
{
int val;
int i, ret;
static void *basePINMUX, *baseCFG, *baseCNF;
volatile GPIO_CNF *pin40;
volatile uint32_t *pinmux40;
volatile uint32_t *pincfg40;
struct sched_param param;
/* Declare ourself as a real time task */
param.sched_priority = MY_PRIORITY;
if(sched_setscheduler(0, SCHED_FIFO, ¶m) == -1) {
perror("sched_setscheduler failed");
exit(-1);
}
// DO GPIO TOGGLE TEST HERE
}
...
The source code : main.zip
I am going to use the ODYSSEY STM32MP157C instead of the Jetson Nano, The STM32MP157 includes dual Cortex A7(650Mhz) and has a Cortex M4(209Mhz) as the co-processor. ODYSSEY STM32MP157C
I plan to use the Cortex M4 to drive the V30 and Cortex A7 uses the PRMsg to communicate to it.
CLK toggling test by M4
IDE
How well does it work?
On Sun, Jul 24, 2022 at 11:40 AM cctsao1008 @.***> wrote:
Reopened #1 https://github.com/homebrew8088/pi86/issues/1.
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Hello @homebrew8088
I do not know why you do not drive the CLK pin of V30 by an oscillator and the raspberry pi controls the READY pin of the V30 to handle the bus traffic.
The READY signal is sampled on each and every memory or I/O cycle. If a device is not capable of responding to the CPU's request in the standard bus cycle, the READY signal can be used to stretch out the cycle, giving it more time.
This is done by signaling to the CPU that the device is not READY. The CPU adds a clock cycle to the bus transaction until it is READY.
BR CCTSAO
Did you see this version? https://youtu.be/warsQ5iunVo
On Mon, Jul 25, 2022, 5:08 AM cctsao1008 @.***> wrote:
I do not know why you do not drive the CLK pin of V30 by an oscillator and the raspberry pi controls the READY pin of the V30 to handle the bus traffic.
BR CCTSAO
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How well does it work? … On Sun, Jul 24, 2022 at 11:40 AM cctsao1008 @.> wrote: Reopened #1 <#1>. — Reply to this email directly, view it on GitHub <#1 (comment)>, or unsubscribe https://github.com/notifications/unsubscribe-auth/APIMBJ7QYZROV5KBZQ5FUETVVV5XFANCNFSM533VIVUQ . You are receiving this because you commented.Message ID: @.>
I am porting it, the partial code of the pi86 needs to be moved to the M4 part. I will share my progress here.
It did not work any faster than just the chip on a card. The bottle neck is the Raspberry PI's GPIO read write speed.
On Mon, Jul 25, 2022, 9:52 PM cctsao1008 @.***> wrote:
How well does it work? … <#m3058264744740719455> On Sun, Jul 24, 2022 at 11:40 AM cctsao1008 @.> wrote: Reopened #1 https://github.com/homebrew8088/pi86/issues/1 <#1 https://github.com/homebrew8088/pi86/issues/1>. — Reply to this email directly, view it on GitHub <#1 (comment) https://github.com/homebrew8088/pi86/issues/1#event-7051691812>, or unsubscribe https://github.com/notifications/unsubscribe-auth/APIMBJ7QYZROV5KBZQ5FUETVVV5XFANCNFSM533VIVUQ https://github.com/notifications/unsubscribe-auth/APIMBJ7QYZROV5KBZQ5FUETVVV5XFANCNFSM533VIVUQ . You are receiving this because you commented.Message ID: @.>
I am porting it, the partial code of the pi86 needs to be moved to the M4 part. I will share my progress here.
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Would you please kindly provide the schematic in pdf, thank you very much.