Why can't i use cmac_stats

[Tyux]

I'm using command sudo ./bin/cmac_stats to start cmac_stats, and get error:

Error at line 195, file User/common/common_functions.c (2) [No such file or directory]

This file clearly exists, I also compile successfully according to the requirements of readme.md in Software

[mariodruiz]

I've never seen this error with this program, but I have a feeling that something is missing

Can you report?

file ./bin/cmac_stats 

and

ldd ./bin/cmac_stats 

[mariodruiz]

See this post https://askubuntu.com/questions/133389/no-such-file-or-directory-but-the-file-exists

[Tyux]

tf@tf:~/Workstation/FPGA/Limago3/Limago/Software$ file ./bin/cmac_stats
./bin/cmac_stats: ELF 64-bit LSB shared object, x86-64, version 1 (SYSV), dynamically linked, interpreter /lib64/ld-linux-x86-64.so.2, for GNU/Linux 3.2.0, BuildID[sha1]=bfc1e047798f1ac26c2df192bbcb51c9bd064afd, not stripped

tf@tf:~/Workstation/FPGA/Limago3/Limago/Software$ ldd ./bin/cmac_stats
    linux-vdso.so.1 (0x00007ffe23e36000)
    libc.so.6 => /lib/x86_64-linux-gnu/libc.so.6 (0x00007ff5e8b9b000)
    /lib64/ld-linux-x86-64.so.2 (0x00007ff5e9191000)

tf@tf:~/Workstation/FPGA/Limago3/Limago/Software$ file User/common/common_functions.c
User/common/common_functions.c: C source, ASCII text

[mariodruiz]

Rereading the error, it is not complaining about the C file (that should've trigger compilation error). It is complaining about opening the FPGA device in this line https://github.com/hpcn-uam/Limago/blob/master/Software/User/common/common_functions.c#L195

Is the FPGA configured? Did you reboot after configuring the FPGA? Did you install the driver?

What is the output of sudo lspci -vvv -vd 10ee:

[Tyux]

Thanks for replying.I'm new to this ... So, what else should i configure. I have installed the driver. And 192.168.0.5 can ping through.

06:00.0 Serial controller: Xilinx Corporation Device 9011 (prog-if 01 [16450])
    Subsystem: Xilinx Corporation Device 0007
    Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
    Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    Interrupt: pin A routed to IRQ 16
    Region 0: Memory at df300000 (32-bit, non-prefetchable) [size=64K]
    Capabilities: [40] Power Management version 3
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
        Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+
        Address: 0000000000000000  Data: 0000
    Capabilities: [70] Express (v2) Endpoint, MSI 00
        DevCap: MaxPayload 1024 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
            ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 25.000W
        DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
            RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop+
            MaxPayload 128 bytes, MaxReadReq 512 bytes
        DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
        LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM not supported, Exit Latency L0s unlimited, L1 unlimited
            ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
        LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
            ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
        LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        DevCap2: Completion Timeout: Range BC, TimeoutDis+, LTR-, OBFF Not Supported
        DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
        LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
             Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
             Compliance De-emphasis: -6dB
        LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
             EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    Capabilities: [100 v1] Advanced Error Reporting
        UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
        UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
        UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
        CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
        CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
        AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-

[mariodruiz]

Were you able to read the cmac_starts?

[Tyux]

Can‘t. Same error

[mariodruiz]

Please elaborate on all the steps you have taken so far

[Tyux]

1.generate bitstream and program device 2.cd to Software directory, and try ./download_driver.sh and make. The following problem occurred, I tried to fix this，but generated more similar problems. So I downloaded the latest driver in https://github.com/Xilinx/dma_ip_drivers, and replace the Software/Xilinx_DMA_Driver contents with the downloaded files in dma_ip_drivers/XDMA/linux-kernel. Then make successed.

3.Type sudo ./load_driver.sh

[mariodruiz]

You need to reboot the server after programming the FPGA. The PCIe link is brought down after programming the FPGA, therefore reboot is needed to re enumerate the PCIe devices.

This is described How to test if the design works expand it by clicking Click to show

More troubleshooting steps here