ht32-rs / ht32f5xxxx-hal

A Rust HAL for the ht32f5xxxx family of chips
BSD Zero Clause License
9 stars 3 forks source link

Bump cortex-m from 0.6.3 to 0.7.1 #15

Closed dependabot[bot] closed 3 years ago

dependabot[bot] commented 3 years ago

Bumps cortex-m from 0.6.3 to 0.7.1.

Release notes

Sourced from cortex-m's releases.

v0.7.1

Added

  • New assembly methods asm::semihosting_syscall, asm::bootstrap, and asm::bootload.

Deprecated

  • msp::write has been deprecated in favor of asm::bootstrap. It was not possible to use msp::write without causing Undefined Behavior, so all existing users are encouraged to migrate.

Fixed

  • Fixed a bug in asm::delay which could lead to incorrect codegen and infinite loops.
  • Improved timing guarantees of asm::delay on multiple-issue CPU cores.
  • Additional compiler fences added to inline assembly where necessary.
  • Fixed DWARF debug information in pre-built assembly binaries.

v0.7.0

Added

  • New InterruptNumber trait is now required on interrupt arguments to the various NVIC functions, replacing the previous use of Nr from bare-metal. For backwards compatibility, InterruptNumber is implemented for types which are Nr + Copy, but this will be removed in a future version.
  • Associated const PTR is introduced to Core Peripherals to eventually replace the existing ptr() API.
  • A delay driver based on SysTick.
  • You can now use LTO to inline assembly calls, even on stable Rust. See the asm/lib.rs documentation for more details.
  • Initial ARMv8-M MPU support
  • ICTR and ACTLR registers added
  • Support for the Security Attribution Unit on ARMv8-M

Changed

  • Previously, asm calls without the inline-asm feature enabled used pre-built objects which were built by a GCC compiler, while inline-asm enabled the use of llvm_asm! calls. The asm system has been replaced with a new technique which generates Rust static libs for stable calling, and uses the new asm! macro with inline-asm. See the asm/lib.rs documentation for more details.
  • Cache enabling now uses an assembly sequence to ensure correctness.
  • ptr() methods are now const.

Breaking Changes

  • SCB::invalidate_dcache and related methods are now unsafe, see #188
  • Peripherals struct is now non-exhaustive, so fields may be added in future

... (truncated)

Changelog

Sourced from cortex-m's changelog.

[v0.7.1] - 2021-01-25

Added

  • New assembly methods asm::semihosting_syscall, asm::bootstrap, and asm::bootload.

Deprecated

  • msp::write has been deprecated in favor of asm::bootstrap. It was not possible to use msp::write without causing Undefined Behavior, so all existing users are encouraged to migrate.

Fixed

  • Fixed a bug in asm::delay which could lead to incorrect codegen and infinite loops.
  • Improved timing guarantees of asm::delay on multiple-issue CPU cores.
  • Additional compiler fences added to inline assembly where necessary.
  • Fixed DWARF debug information in pre-built assembly binaries.

[v0.7.0] - 2020-11-09

Added

  • New InterruptNumber trait is now required on interrupt arguments to the various NVIC functions, replacing the previous use of Nr from bare-metal. For backwards compatibility, InterruptNumber is implemented for types which are Nr + Copy, but this will be removed in a future version.
  • Associated const PTR is introduced to Core Peripherals to eventually replace the existing ptr() API.
  • A delay driver based on SysTick.
  • You can now use LTO to inline assembly calls, even on stable Rust. See the asm/lib.rs documentation for more details.
  • Initial ARMv8-M MPU support
  • ICTR and ACTLR registers added
  • Support for the Security Attribution Unit on ARMv8-M

Changed

  • Previously, asm calls without the inline-asm feature enabled used pre-built objects which were built by a GCC compiler, while inline-asm enabled the use of llvm_asm! calls. The asm system has been replaced with a new technique which generates Rust static libs for stable calling, and uses the new asm! macro with inline-asm. See the asm/lib.rs documentation for more details.
  • Cache enabling now uses an assembly sequence to ensure correctness.
  • ptr() methods are now const.

Breaking Changes

... (truncated)

Commits


Dependabot compatibility score

Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting @dependabot rebase.


Dependabot commands and options
You can trigger Dependabot actions by commenting on this PR: - `@dependabot rebase` will rebase this PR - `@dependabot recreate` will recreate this PR, overwriting any edits that have been made to it - `@dependabot merge` will merge this PR after your CI passes on it - `@dependabot squash and merge` will squash and merge this PR after your CI passes on it - `@dependabot cancel merge` will cancel a previously requested merge and block automerging - `@dependabot reopen` will reopen this PR if it is closed - `@dependabot close` will close this PR and stop Dependabot recreating it. You can achieve the same result by closing it manually - `@dependabot ignore this major version` will close this PR and stop Dependabot creating any more for this major version (unless you reopen the PR or upgrade to it yourself) - `@dependabot ignore this minor version` will close this PR and stop Dependabot creating any more for this minor version (unless you reopen the PR or upgrade to it yourself) - `@dependabot ignore this dependency` will close this PR and stop Dependabot creating any more for this dependency (unless you reopen the PR or upgrade to it yourself)
dependabot[bot] commented 3 years ago

Superseded by #16.