Affordabilty of PCBs

[Duckle29]

I'm looking at getting a few of these made for sure, for my current printer, and was pricing it out.

At the current dimensions, 125 * 40mm I'm looking at 36 USD on easy EDA for 5 boards. That's 7.29 USD/board

If the board was instead 100 * 50mm (same area) you could panelize two of those together with v-grooves between them, which means you could get 10 boards for 32 USD, which would be 3.2 USD/board

This is because as long as you are within a 100x100mm panel, you fall into their cheap "this is what we have a price war on" price, but when you go over 100mm, you just get a "sq mm" price.

[Duckle29]

I'll take a stab at fitting the design in that area in the weekend for sure :) I feel like moving the connectors at the ends down should do the trick.

[hzeller]

Yeah, unfortunately, I couldn't squeeze it in 100mm, I tried :) Unfortunately, 4-layer boards really only start to be affordable with a little more quantity.

I have a couple of earlier version boards (version from 2017-11-19), that is mostly the same as the last version with only one minor issue that doesn't matter. If you are living in the US, I can send you one with domestic shipping (with components, it looks like this. I have not tested it yet, hopefully this weekend will be time). So if you want one, send me your address via email.

[Duckle29]

I'm in Denmark, but no need :) I kinda want to do the jiggling and give it a shot :P

I see that post you linked brought up a question I also have. Exact protocol. The datasheet isn't super clear on it. I was interested in how you got data out of them. I suppose just shifting in the appropriate query command to the appropriate chip, then keeping clocking until the message shifted its way through all of the chips?

[hzeller]

I need to test that again; last time I played with it was a while back. I think what happens is, while you shift in configuration bits, the current status bits come out on the other side, followed whatever is spilled over from the shift register.

So it should be possible to shift in 4x configuration data that then end up in the right chips and 4x status data has come out on the other side by then.

[Duckle29]

Interesting

[hzeller]

I'll update the readme once I played with it.

[Duckle29]

6.3 Bus Architecture in the datasheet is what I needed to read. They work just like switch registers when chained, meaning that if you want to read from all of them, you can send 4 read commands, then clock in 160 pulses to shift that back to the master.

[Duckle29]

From reading the datasheet. I think it's something like that. I'm not 100% sure if you need to pull CSN low again after sending the 4 commands, or if the interface will happily shift away with CSN high.

So the only thing I'm unsure of would be CSN.

Edit: Here's the wavedrom script if you want to tweak the timing diagram:

{
  signal: [
    ['Send config',
        {name: 'CSN', wave: '10...............................................................................1', phase: 0.5},
        {name: 'SCK', wave: '0P...............................................................................'},
     {name: 'SDI', wave: 'x3...................3...................3...................3...................x', phase: 0.5, data: ["MSB first: Stallguard - Filter:0  Threshhold:0 Current scale 1 |Driver 4","MSB first: Stallguard - Filter:0  Threshhold:0 Current scale 1 |Driver 3","MSB first: Stallguard - Filter:0  Threshhold:0 Current scale 1 |Driver 2","MSB first: Stallguard - Filter:0  Threshhold:0 Current scale 1 |Driver 1 "]},
        {name: 'SDO', wave: 'x.................................................................................', phase: 0.5},
    ],
    {},
    {},
    ['Response',
     {name: 'CSN', wave: '1.................................................................................', phase: '0.5'},
     {name: 'SCK', wave: 'P................................................................................'},
     {name: 'SDI', wave: 'x.................................................................................',phase: '0.5'},
     {name: 'SDO', wave: 'x3...................3...................3...................3...................x', phase: 0.5, data: ['MSB first: Stallguard response data |Driver 4','MSB first: Stallguard response data |Driver 3','MSB first: Stallguard response data |Driver 2','MSB first: Stallguard response data |Driver 1']},
    ],
],
 head:{
   tick:0,
 },
 foot:{
     tick:81,
 }
}

[Duckle29]

You can check out my work in my fork. I'm almost done with power, and now only have to get to data, but that's for another day.

[Duckle29]

I think I'm done. I just need to move the graphics in. If you are interested. I'd love for you to check out the routing. I've cut a few pours, but I'm fairly certain everything should be able to handle 5A per driver.

I've also implemented the Stallguard pin, buy using 4 diodes common cathode, to a pulldown resistor. This effectively works like a 4 input or gate :)

[hzeller]

Don't forget to push your changes, your github still shows yesterdays' state.

[Duckle29]

Thanks for the reminder. Pushed :P

EDIT: I've also used the latest nightly and it seems they've changed quite a few library names. So there's that :/

[hzeller]

NIce. Some smallish things I noticed:

• Pin 4 of your power connector is not connected to ground. Looks like a Junction went missing in the schematic.
• The zones around the power connector pins are not with THT-Thermal. It might be hard to solder.
• Like GND, I'd probably stitch a couple of inner layers to the PowerIn part as well; we have the copper, we should use it.
• The diode array is inside the IDC connector courtyard. It might work, as they usually 'hover' a little, but if there is the space, probably keeping it outside is a good idea.
  • there is a break of the copper pour on the inner layer 1 between the R300 resistor and Pin 17 of the corresponding TMC2660. Not a big deal too much (as the other layers take care of that) but we want to have the potential of GND not fluctuate too much as the shunt output is measured towards this ground.

[Duckle29]

Thanks :) For high power pins, I prefer the inconvenience when soldering, to instead have a nice solid connection to the board, physically and electrically :)

As for stitching, how necessary is it, when the gnd input is through hole? IIRC I have gnd pour on all 4 layers from the power input :)

[Duckle29]

Also fixed the pour around R300

[Duckle29]

I might be getting a few of these made in Jan or Feb, I'll send you one if you want?