Logical operator port issues with validation

[ugurdogrusoz]

As identified as part of #19, when a logical operator does not have ports, we seem to incorrectly take it as a sign of source/target issue, etc. To allow maps where ports are not in use, we should relax this requirement for our tool as follows (use the following file for reproducing these problems, examples are in square brackets): logic-operator-port-problems.sbgn.txt

• pd10109 [AND-uncertain process,NOT-process] (Modulation arc must have source reference to glyph of EPN classes or a logical operator): if we get this error, we should check if the source of a modulation arc (any one of 5 types of effectors in PD: modulation, stimulation, catalysis, inhibition, and necessary stimulation) in question is a logical operator. If so, even if the modulation arc is not connected to a port of this logical operator, this is valid, so we should ignore such errors raised.
• pd10111 [AND] ('and', 'or', and 'not' glyphs must be the source for exactly one arc): if the source of an arc is indeed a logical operator (but not a port of that operator), we should ignore such errors.
• pd10124 [OR-NOT] (Arc with class logic arc must have source reference to glyph of EPN classes, or logic gates): if a logic arc has a source that is a logic gate/operator, we should ignore the error even if it's not connected via a port.
• pd10125 [G-NOT] (Arc with class logic arc must have target reference to a logical operator): if a logic arc has a target, which is a logical operator, we should ignore the error even if it's not connected via a port.
• pd10126 [NOT] (The 'not' glyph can only be the target of one logic arc glyph): A 'not' glyph should have only one incoming edge, which must be a logic arc, even if this arc is not connected to the 'not' glyph via a port.
• pd10142 [A-AND,G-NOT] (Logic arc must be connected to either 'OR', 'AND' or 'NOT'): A logic arc must have at least one source or one target, which must be a logical operator, even if the connection is not via a port.

[YusufZiyaOzgul]

@ugurdogrusoz all of these errors are handled. if the rule is satisfied without having ports, error is ignored.

[ugurdogrusoz]

As you can see from the above example, now we do not have any of the previous issues in Syblars. However, when arcs sometimes use ports and sometimes don't and edges connecting to logical operators without ports are ignored for certain other calculations (e.g. how many outgoing edges from a logical operator), we miss problems like the following and report this as a valid map:

• AND gate has more than 1 outgoing arc
• NOT gate has more than 1 incoming arc Are we perhaps ignoring the fact that some arcs don't use ports a bit too late? Please investigate and report. We could make an assumption that maps either have all arc using ports or all not using them if this will make things easier.

[YusufZiyaOzgul]

@ugurdogrusoz I have processed errors in backend and for the outgoing arc problem, if a logical operator has more than one outgoing arc( including edges connected via port and not connected via port), I added pd10111 error if it is not added, for incoming arc problem for the NOT operator, I did similar and added pd10126 error.

[ugurdogrusoz]

Is the only case we don't handle when a map is mixed using and not using ports @hasanbalci ? If so, should be ignore this case and close this issue?