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ibm-capi / pslse

Power Service Layer Simulation Engine
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PSLSE for CAPI2.0 not allow a br_lat value of 2 #90

Closed ThomasFuchs closed 7 years ago

ThomasFuchs commented 7 years ago

I found the following in the CAPI2.0 docu: Read buffer latency. This bus is a static indicator of the access latency of the read buffer. It must not change while there are commands that have been submitted on the command interface that have not been acknowledged on the response interface. It is sampled continuously. However, after a reset, the PSL assumes this is a constant and that it is static for any particular AFU. 0 Data is ready the cycle after ha_brvalid is asserted. 1 Data is ready the second cycle after ha_brvalid is asserted. 2 Data is ready the third cycle after ha_brvalid is asserted. All other values are illegal

But in pslse/cmd.c I found this: case PSL_COMMAND_WRITE_MI: /fall through / case PSL_COMMAND_WRITE_MS: /fall through / case PSL_COMMAND_WRITE_NA: /fall through / case PSL_COMMAND_WRITE_INJ: /fall through / if (!(latency % 2) || (latency > 3)) error_msg("Write with invalid br_lat=%d", latency); _add_write(cmd, handle, tag, command, abort, addr, size, unlock); break;

The result is that br_lat equal 2 is not working!

LanceThompson commented 7 years ago

Thanks for the report. We'll take a look at it.

LanceThompson commented 7 years ago

It looks like Helena has committed a fix to this in the capi2 branch. I'll close it here.