ic-lab-duth / ApproximatePrefix

Synthesis of Approximate Parallel Prefix Adders
MIT License
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Software #1

Open Chaitanya36500 opened 1 month ago

Chaitanya36500 commented 1 month ago

What is the software you used ?

gdimitrak commented 4 weeks ago

the code is compiled with standard C++ (G++). The resulting verilog code can then be synthesized with standard industrial EDA tools (Cadence, Synopsys, Siemens) or even open source tools like Yosys