A (10k?) resistor between CRESET_B on the FPGA and ADBUS7 on the FTDI.
A (2-pin through hole) jumper that allows grounding of CRESET_B.
I would have needed that a few times now when writing designs that talk to the flash, or use the flash io pins. When the design puts the flash in state where it is not responsive anymore, you need to find a way of preventing the FPGA from booting on power up or you cant reprogram the flash anymore.
Please add the following feature:
CRESET_Bon the FPGA andADBUS7on the FTDI.CRESET_B.I would have needed that a few times now when writing designs that talk to the flash, or use the flash io pins. When the design puts the flash in state where it is not responsive anymore, you need to find a way of preventing the FPGA from booting on power up or you cant reprogram the flash anymore.