WIP: Clean Legic Reader

[drandreas]

I've rewritten Legic Reader RX and TX path. It is still a little unstable but should be ready for a first review.

Remaining tasks are (not ready for merge):

• [ ] Clean-Up Read Prng
• [ ] Add Write
• [ ] Implement adaptive rx sensitivity
• [ ] Signal activity on LEDs
• [ ] Re-Add Traces

For the last two I'm unsure what the proper way of doing it is. I would appreciate a little help 😅.

[iceman1001]

Great and thanks for all the explainations how the FPGA works :)